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FPGAmstrad

1,662 bytes removed, 21:50, 20 March 2015
/* On MiST version */
===On MiST version===
Games that doesn't run are :
*'''crazycar.dsk crazyca2.dsk''': the VRAM mirror double buffer (from &8000 to &BFFF) contains stranges pixels*'''commando.dsk''': pixels that should be deleted are not deleted.(only VRAM &C000-FFFF seems used)*'''atomdriv.dsk''' : freeze.*'''XOR.dsk''' : second presentation page is full black.*'''P47.dsk''' : border left and right are flashing during game(the music does freeze also).
Perhaps the "reset r52 interrupt counter" shall crazycar.dsk does int<use lowerVRAM='0' instead of int<='1' as I added a not between gatearray 00 (&0000-3FFF and Z80. I have to reproduce the bug into NEXYS4 before all => interrupts are checked ok (vs cpctech&C000-FFFF area for VRAM).
I know that ChaseHQ and Arkanoid looks great, so double RAM buffer crazycar2.dsk does use lowerVRAM=10 (from &8000 to &-BFFFand &C000-FFFF area for VRAM) is activedwhile overscan presentation, but normaly it shall unlock XOR and P47, so this second RAM part is perhaps badly plugged lowerVRAM=00 (A14 inversed ? WR on one &0000-3FFF and RD on another, double WR on one ?, bad memory size ?) => &C000-FFFF area for VRAM is plugged correctly) during play.
About Xor, do test a RAM DumpXORThe SDRAM patched in order to write RAM under ROM is not implemented in VRAM mirror. Behaviour to check. => light version, with fix RAM 0 1 2 3 and quicker address solving dsk does exactly the same, so the bug isn't by here. VRAM mirror is something new since NEXYS2 to NEXYS4 so it seems a good way.use lowerVRAM=> DISP signal not crossed correctly with crtc_W / bvram_W ?<= checked ok.crtc scanner offset jumps problem ? => checked ok... Can look after a old NEXYS4 version, perhaps the first ones doesn't has "internal mirror VRAM", but a clk sequencer in external RAM. => do try another VRAM double buffer bank, in simple_GateArrayInterrupt.vhd do play with : crtc_A_mem01 (14 downto 0):=MA(13 downto 12) & RA(2 downto 0) 4000-7FFF and & MA(9 downto 0);crtc_A(14 downto 0)<=crtc_A_mem(13 downto 0) & tic; <= shall be crtc_A(15 downto 0) be here...  => and AmstradRAMDSK.vram_A_isValid C000-- A(15) : >8000h vram_A_isValid<= init_done and not(transmit) and A(17) and not(A(16)) and A(15); Do check the FFFF area for VRAM write speed also : is still a screen written at 50/60Hz ? do check vertical_counter/horizontal_counter scan related to that.horizontal_counter=64, vertical_counter=38*(7+1)+7+0=311, so 64*311=19904, 19904/1000000=0.019904sec (1MHz), 1/0.019904=50.2411Hz, no problem by here...
== Effort done ==
1,200
edits