Changes
PWM
, entity PWM is
port (
clk : in std_logic;-- 1MHz : same one as sound chip clk
PWM_in : in std_logic_vector (7 downto 0) := "00000000";
PWM_out : out std_logic
entity PWM is
port (
clk : in std_logic;-- 50MHz : higher than dog and cat frequency clk_ref : in std_logic;-- 1MHz : same one as sound chip clk
PWM_in : in std_logic_vector (7 downto 0) := "00000000";
PWM_out : out std_logic
