Changes

Intel 8086

463 bytes removed, 4 February
/* Register Structure */
*'''Segment Registers:''' CS (code), DS (data), SS (stack), and ES (extra) which define the memory segments for program code, data, and the stack.
*'''Instruction Pointer and Flags:''' A 16‑bit instruction pointer (IP) and a 16‑bit status register (Flags). This register includes six status flags (zero, carry, sign, overflow, parity, and auxiliary carry) to indicate the outcomes of operations. It also contains three control flags: the Direction Flag controls the direction in which string instructions act, the Interrupt Flag to enable/disable interrupts and the Trap Flag for single-step debugging.
 
===Internal Registers===
 
The 8086 has several internal registers that are invisible to the programmer but are used by the microcode.
 
Memory accesses use the Indirect (IND) and Operand (OPR) registers; the IND register holds the address in the segment, while the OPR register holds the data value that is read or written.
 
Although these registers are normally not accessible by the programmer, some undocumented instructions provide access to these registers.
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