Changes
/* Opcodes */
|}
|}
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== Oddities ==
* EI has a 1-instruction delay. It is necessary for doing EI/RETI without any danger of nested interrupt routines.
* RST instructions are just a CALL instruction to a fixed address baked in the instruction itself.
* Despite what the syntax of the instructions JP (HL/IX/IY) suggests, PC will be loaded with the contents of the register itself, not the indexed value. Those instructions should be understood as JP HL/IX/IY.
* The instructions LD A,A, LD B,B, LD C,C, LD D,D, LD E,E, LD H,H and LD L,L are useless. Their existence is just a side effect of how instructions are encoded as opcodes in the CPU.
* While the syntax of the 8-bit ADD, ADC and SBC instructions all explicitly mention the A register, the SUB instruction does not mention it.
* Arithmetic can only really be done on the A register.
* PUSH and POP instructions utilize a 16-bit operand and the high-order byte is always pushed first and popped last. PUSH HL is PUSH H then L. POP HL is POP L then H.
* ADD SP,e takes 4 cycles, while LDHL SP,e takes only 3 cycles.
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[[Category:Non CPC Computers]]
[[Category:Electronic Component]]
