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Intel 8086

2,056 bytes added, 27 April
/* Register Structure */
See: [https://www.righto.com/2023/07/8086-pins.html Reverse-engineering the 8086 processor's address and data pin circuits]
== Register Structure File ==
The 8086 provides fourteen 16‑bit registers. Its register file includes{| class="wikitable" style="white-space:nowrap;"! Register !! Size !! Description !! Notes*'''Data Registers:''' |-| AX (accumulatorAccumulator)|| 16-bit || Primary register for arithmetic, logic, I/O. || Can be accessed as two 8-bit registers: AH (High) and AL (Low). Often an implied operand.|-| BX (baseBase)|| 16-bit || General-purpose, often used as a base pointer for memory addressing. || Can be accessed as BH and BL. Only GP register usable as an offset in memory addressing (e.g., `[BX]`).|-| CX (counterCount)|| 16-bit || General-purpose, often used as a loop counter (`LOOP` instruction) and DX for string operations (data`REP` prefixes). Each accessible || Can be accessed as high (AH, BH, CH, DH) and low CL.|-| DX (ALData) || 16-bit || General-purpose, BLused for I/O port addressing (`IN`, CL`OUT`), and holds high word in 16x16 multiplication / 32/16 division. || Can be accessed as DH and DL) 8‑bit registers.*'''Pointer and Index Registers:''' |-| SP (Stack Pointer) || 16-bit || Points to the top of the current stack pointer(offset within SS). || Used implicitly by `PUSH`, `POP`, `CALL`, `RET`, interrupts.|-| BP (base pointerBase Pointer), || 16-bit || Points to data within the stack segment (offset within SS). || Often used to access function parameters and local variables on the stack.|-| SI (Source Index) || 16-bit || Used as a source indexpointer offset (usually within DS)for string operations. Can be used as a general-purpose index register. || Default segment is DS, and can be overridden.|-| DI (Destination Index) || 16-bit || Used as a destination indexpointer offset (usually within ES) for string operations. Can be used as a general-purpose index register. || Default segment is ES for addressing and data manipulationstring ops, can be overridden.|-| IP (Instruction Pointer) || 16-bit || Holds the offset address of the next instruction to be executed within the current Code Segment (CS). || Analogous to Program Counter (PC). Cannot be directly manipulated by most instructions (modified by jumps, calls, etc.). Physical address = (CS *16) + IP.|-| FLAGS || 16-bit || Contains status and control flags: <br/> '''Segment RegistersStatus Flags:''' CS <br/> * bit 0 - CF (codeCarry Flag), DS <br/> * bit 2 - PF (dataParity Flag), SS <br/> * bit 4 - AF (stackAuxiliary Carry Flag), and ES <br/> * bit 6 - ZF (extraZero Flag) which define the memory segments for program code, data, and the stack.<br/> *bit 7 - SF (Sign Flag) <br/> * bit 11 - OF (Overflow Flag) <br/> '''Instruction Pointer and Control Flags:''' A 16‑bit instruction pointer <br/> * bit 8 - TF (IPTrap Flag) and a 16‑bit status register <br/> * bit 9 - IF (FlagsInterrupt Enable Flag)<br/> * bit 10 - DF (Direction Flag) <br/> (Other bits are undefined/reserved in 8086) || AF used for BCD arithmetic. This register includes six status flags DF controls string op direction (zero, carry, sign, overflow, parity, and auxiliary carryinc/dec SI/DI) . TF enables single-stepping. IF enables maskable interrupts.|-| CS (Code Segment) || 16-bit || Points to indicate the outcomes base address of operationsthe current code segment. It also contains three control flags: || Used with IP to find the Direction Flag controls next instruction.|-| DS (Data Segment) || 16-bit || Points to the direction in which string instructions act, base address of the Interrupt Flag current data segment. || Default segment for most data access.|-| SS (Stack Segment) || 16-bit || Points to enable/disable interrupts the base address of the current stack segment. || Used with SP and BP.|-| ES (Extra Segment) || 16-bit || Points to the Trap Flag base address of an extra data segment. || Often used as the destination segment for single-step debuggingstring operations (with DI).|}
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