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AMSSIO

2,316 bytes added, 20:46, 11 April 2016
Just a change of my website url
A new and improved version is the AMSSIO II.
 
== Description ==
 
AMSSIO is a RS-232 serial interface for the CPC464 (and 664/6128) and it exists in three different versions which all uses the MC6850 asyncronous communication interface adapter (ACIA) from Motorola.
 
* The first version was based on components from the scrap yard. But the MC14411 is a bit bulky and by now rather old and somewhat hard to find. The second and third version was an attempt to work around the MC14411.
* Version 2 uses a 4060 ripple counter as clock generator. But it can be tricky to make it operate at 2.5 MHz. This was the reason for version 3...
* The version 3 uses a 74LS393 to divide the 4 MHz CPU clock by 26 to obtain the 153 kHz for the serial clock (9600 * 16).
 
"I couldn't get the software to receive faster than 9600 :-( But it was at least 4 times faster than the tape transfer rate :-)."
All three versions are supposed to use the CPU socket in the CPC. The CPU socket on AMSSIO is meant to be a wire wrap socket. The CPU is removed from the CPC main board. AMSSIO is mounted in the empty socket and the CPU is placed in the 40 pin socket on the AMSSIO.
== Technical ==
=== AMSSIO (v1,v2,v3) ===Connects between Z80 CPU and mainboard. Uses a 1.8432MHz oscillatorI/O Ports for AMSSIO v1, MC14411P bit rate generatorv2, a v3 are:  FBF0h AMSSIO Serial Interface [[6850 ACIAchip|MC6850]] Control/Status Register (R/W) FBF1h AMSSIO Serial Interface [[6850 ACIA chip|MC6850]] Data Register (R/W) For details on the MC6850 chip, see [[6850 ACIA chip]]. Observe that the baudrate CLK sources differ for v1,v2,v3. In v3 the CLK is fixed, v1/v2 have different jumper-selectable CLKs. And, the photo shows a MAX232 voltage converterdifferent CLK crystal than the schematic. So, and 74LS04 and 74LS08 logic chipsdon't expect different AMSSIOs to be compatible with each other. === AMSSIO-II (v4) === AMSSIO-II is a newer version, using a 44pin 16C850CJ instead of the 24pin MC6850. Aside from the schematic (see below), there is no documentation or source code for AMSSIO-II. I/O base address can be FBE0h or FBF0h (jumper-selectable). Unlike the previous versions, this version also connects to the Z80's interrupt input.
Port addressesThe "PC" attached to the "16C850CJ" part number (labeled as "16C850CJPC" in schematic) is meant to say that the chip is wired to "PC Mode" (SEL, schematicsPin 34 = GND). In the PC Mode, and differences between versions Ithe chip tries to decode PC ISA bus addresses (COM1-III 4 = 3F8h,2F8h,3E8h,2E8h), some address lines are unknown (swapped, so the AMSSIO webpage doesn't exist anymoremaps to FBE0h or FBF0h (selected by S1 input) whilst the chip "thinks" it is mapped to COM3/COM4 ISA bus addresses (3E8h/2E8h).''Unclear: the jumper on S1 should change "A8" - but the schematic is wired as if "A4" changes - which would require a jumper on S2, not on S1 (?)''
* [[6850 ACIA chipMedia:XR16C850.pdf]]- 16C850 Datasheet
== Software ==
== Weblinks ==
[http://www.citystromerzacho.dkorg/CPC/ AMSSIO project <s>lives</s> sleeps here!]
[[Category:Hardware]] [[Category:Peripherals]] [[Category:Serial interfaces]] [[Category:DIY]]
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