Changes

*'''Orion Primes.dsk''': does display "secteurs entrelacés" - "vérifiez votre copie", a FDC problem, perhaps "sectorId++" is not the good way to reach next sector, or else two tracks in one track. Does pass on Sorgelig fork.*'''Batman_Forever.dsk''': some problem during flying chip demo part (one garbage line), and several rupture showing ghost lines around Vcc=0. Rupture solved in r005.8.16c4, but flying chip now show a half garbage of pixels. Batman seems CRTC1. '''BattroProblems with FDC in r005.dsk''' seems also CRTC1 and does fail completly8.16 (does slow animations, like if I missed some "not ready" signal ?)*'''30YMD.dsk''': in Benediction demo, at bottom some time you see some ghosts of central animation (too many HSync per screen ?), solved in r005.8.16c4 16 (CRTC0 seems perfectly implemented). 30YMD seems CRTC0, running fine except that changing disk feature does still fail.*'''arkanoid2.dsk''': don't run in r005.8.13, but fine in r005.8.13e (experimental fork), ok in r005.8.14 (using default OSD value : MEM_WR=quick)*'''trailblazer.dsk''': no more "raster" problem since r005.5, it's now perfect ! Palette heuristic offset (done for unlocking Batman Forever Demo) has a small effect in left (squares are inserted/not separated by a black line in first column) - same small defect in TV mode using r005.8.14.2... Thinking about a HSYNC offset of 2 (instead of 1 currently) then also delaying DATA+HDISP of 1 (charinserted/inserted signal ?)*'''imperial_mahjong.dsk''': modern EXA/EXA2 resolution not passing my color pallet heuristic :p- does pass on Sorgelig fork.

'''moktar.dsk''' / '''super_cauldron.dsk''' does run fine since r004.8.1.1. Morkar run fine in r005.8.16c4 using CRTC0 and MEM_wr=slow. Super Cauldron bottom bar is fine in r005.8.16.4 when we select "right border" (instead of default left one) during "screen synchro" menu welcome.

== Effort done =On MiST-board CoreAmstrad version - TAPES ===

=== Instruction timing ===https://cpcrulez.fr/GamesTest/legend_of_steel.htm :I tested instruction timing of [[T80]] compare to instruction timing of JavaCPC emulator Hello, a nice game, unfortunately graphic error at 50 and 72 Hz. I deduce synchronization of Z80 with CRTC My monitor can be 50Hz. 48Hz not. Why does the game show 48Hz on M1 signal by WAIT_n insertion in order to have a multiple of 4 Tstates per instructionmy monitor? https://cpcrulez. I deduce also one WAIT_n inserted during MEM_WR operation (yes I log testbench [[T80]]fr/GamesTest/legend_of_steel.htm Best regards, I’m crazy)MiC

I just made a test bench log List of [[T80]] known running TAPE games (log of instructionon r005.8.16.8.3c9): A Magician s Apprentice (txt), A Message from Deep Space (txt), A View To A Kill, Aaargh!, '''Academy''' (missile commander 360°), Advanced Destroyer Simulator, Advanced Lawnmoving Simulator (by '''DevilMarkus'''), After Shock (txt+img), '''Aftermath''' (missile commander), Air Attack, Air Traffic Control - Heathrow, Air Traffic Control - Schiphol, '''Airborne Ranger''' (aircraft or walk), Airwolf, Aladdin s M1Cave, and first M1 coming after knowing that I send '''Alex Higgins World Snooker''' (pool table), Algebre, Ali Candil Y El Teroso dde Sierra Morena, Alien TurboAmstrad, Alien Syndrome, Aliens The Computer Game, '''Alkahera''' (spacecraft simulator), Alpine games, Alsim, Alternative World Games, Amaurote, Amsgolf, AmstradMagazine Le Survivant, Amstrad Shuffle (card games), Amstrad Tecla a lot Tecla, Amstroid (txt), '''Amstroids''', Angelique A Grief Encounter (txt), '''Angleball''' (pool table), Animal Vegetable Mineral, Annals of NOP after my instructionRome, Antalex (txt), and compare it to a JavaCPC timing array. Some instructions was not tested '''All Points Bulletin''' (interrupt waitlittle car), Apocalipsis New (txt), Arcade Fruit Machine, Arcos, Ariane, Arnhem, '''Asphalt''', Assault Course, Asterix and special timing the Magic Cauldron, Astro Plumber, '''Atahualpa''' (instructions with change timingangel), '''Athlete''', Atlantida 3000 (platform), but all others passed correctlyAtlantis Anirog, Atlantis (txt), '''Atomic Battle''' (asteroids), '''Atomic Driver''' (little car), Auftraq In Der Bronx (txt), Aufwarts Zur Rettung (donkey kong), '''Avenger Way of the Tiger II''', Aventure Au Chateau (adventure), '''Azar Menu''',Abu Simbel Profanation, Ace of Aces, Advanced Pinball Simulator (CPC-Power), After The War, Afteroids (CPC-Power), Agent X 2, Alien Highway, American Football, Amo Del Mundo, Amsgolf, Amsoccer (del key to launch party), Amstrad Unlocked, Animated Strip Poker, Aquad, Arkanoid, Arkanoid II, Arkos, Army Moves, Artura, Ashkeron (txt), Atlantis Anirog, Atom Ant, Auf Wiedersehen Monty, Autocrash, Auxilio Aereo.

==== Instruction timing Games that doesn't run are : currently * '''Action Force.cdt''': freeze during loading, black screen with green border, nothing more. glitch in r008r005.58.14 ====16.8.3c8In GA* '''Adidas Championship Football.cdt''': freeze after loading.* '''Afterburner.cdt''': nothing after load (still black screen with colorfull border) reboot* '''Alien Attack.cdt''': simple tape, I do use begin but freeze (idFF : end of edge tape) saying "is loading". Same using WinAPE.* '''Alien Legion.cdt''': not enough in line 19 : memory &9FFF. Run in r005.8.16.8.3c9 but no key ?* '''Alta Tension.cdt''': 007 Living in fact, same vsync problem than disk version.* '''AMC Astro Marine Corps.cdt''': welcome picture not drawn completely, do load data for IO_ACK instead nothing and then freeze.* '''Anatomie.cdt''': end of statetape idFF.* '''Arnold Goes to Somewhere Else.cdt (txt)''': Rewind tape.* '''Atlantida 3000''': welcome picture seems not fully loaded, but game starting. Same in WinAPE.* '''ATV Simulator.cdt''': nothing after load (still black screen with colorfull border), reboot* '''Automec.cdt''': reboot during game (second tape of three)

M1 reached same Back-Tron, Bacterik Dream (puzzle), Bactro (tron), Bactron, Balade Outre-Rhin (txt), '''Ball Breaker II''' (breakout), Ballon Buster (press space to unlock black screen, and another time of IO_ACK are ignored after welcome screen displayed), Barry McGuigan Word Championship Boxing, Batalla de Inglaterra, Batalla Naval, Battle ships, Battle Tank Simulator, '''Batty''' (not M1breakout) , Beat the Clock (scrabble), Behind The Lines (txt), Berks 3, '''Bestial Warrior''' (platform), Beta-2515, '''BeTiled''' (Bejeweled), Better Spelling, Big Trouble in WAIT_n generator.Little China, Blade Runner, Blagger, Blindado, Blitz AmstradAction, Blockbusters, '''Blue Tomb''' (bomberman), BMX Ninja, '''Bob Morane Espacio''', '''Bomb Jack''', Border Harrier (adventure), '''Bosconian 87''' (Asteroids), '''Boulder Dash 3''', Brian Jacks Superstar Challenge (run), Bride of Frankenstein, Bridge (card), Bronx, '''Bubble Bobble 4''', Bubble Dizzy, Buffalo Bill s Rodeo Games, Buggy II, '''Buggy Boy''', Bugs Buster, Bullseye, Bump Set Spike, Bundesliga Manager 3 (tool), Buscate la vida, Business Plus, '''Buster Block''', Ball Crazy, Barbarian, Bataille Pour Midway, Battle for Midway, Beach Buggy Simulator, Bedlam, Beyond the Ice Palace, Bivouac, Black Beard, Blasteroids, Brawn Free (txt), Bruce Lee, Bubble Bobble (2014-06-20), Buitre-Emilio Butragueno Futbol

MEM_WR has an OSD menu choice * '''Back to switch between "quick" and "slow"Reality.cdt''': Rewind tape.* '''Barbarian II.cdt''': black screen blue border. Welcome screen with glitchs* '''Beach Head 2.cdt''': freeze load. Reboot id13* '''Blood Valley.cdt''': welcome screen, "slowRead error b" mode does insert ONE WAIT_n during detection * '''Bomb Jack 2.cdt''': welcome picture not load completely, freeze.* '''Boom.cdt''': load until block 16, then freeze. Reboot at block 21.* '''Booty.cdt''': second welcome screen then freeze. id15 (ear)* '''Boulder Dash 4.cdt''': not a game but a tool kit, * '''Brainache.cdt''': no pause at begin of tape, welcome screen turn into black screen at end of MEM_WRtape (idFF)* '''Bugs. This switch exists because somes games are running in cdt''': "slowRewind tape" mode and others in "quick" mode.message

In fact it exists several instruction making MEM_wr, and adding each one ONE WAIT_n does result in different case * '''CORE Anatomie''': end of synchronizationtape idFF.

[http://www.cpcwiki.eu/forum/emulators/cpc'''Dan Dare 1''', Dances With Bunny Rabbits (txt), Danger Adventurer at work (txt), Danger Mouse In Makin, Dark Side, Dark Star, '''Darts''', De la Terre a la Lune, Deactivators, Deadenders (txt), '''Deadly Evil''' (walk platform), Deathkick (right part of keyboard), '''Deathscape''', Dedalos, '''Defcom1''', Demon Attack, Dempsey and Makepeace, Dernier Metro, Desert Rats, Devil s Castle, Diamond Mine, Diamond Mine 2 (same ?), Die Heilige Rustung Des '''Antiriad''', Die Tiefe (txt), Die You Vicious Fish (txt), '''Digger Barnes''', '''Dimension Omega''', Dirk, Dizzy 2 Treasure Island, Dizzy 4 Magicland, Dizzy 5 Spellbound, Dizzy 6 Prince f the Yolkfolk, Dizzy Down the Rapids, Dominoes (keyboard F1-z80-timing/ CPC Z80 timing]F7 + space), '''Doodle Bug''' (pacman+), Doomsdark's Revenge (txt), Dr Jackle and Mr Wide, Dracula (txt), Dragon's Lair, Dragons of Flame, Driller, Druids Moon (txt), Duel A Abilene, Dun Darach, Dungeons Amethyst (txt), Dynamite Dan, DynamixDaley Thompson Super Test 1, Dark Fusion, Death Stalker, Death Wish 3, Desperado, Die Alien Slime, Dizzy Amstrad Action Special Edition, Dizzy Cristal Kingdom, Double Dragon, Dragon Spirit, Dragontorc, Dustin

If it* '''Daleks.cdt''': use of right part of keyboard as arrow (not mapped)* '''Daley Thompson s about managing GA reading pixels, perhaps Olympic Challenge.cdt''': reboot* '''Damas.cdt''': Rewind Tape* '''Dark Sceptre.cdt''': Rewind to 04* '''Dark Man.cdt''': black screen pink border* * on r005.8.16.8.1c3* '''Death Pit.cdt''': welcome screen not only M1 signal are synchronized but also the MEM_RD and MEM_WR accesses at another offsetloaded completely idFF* '''Deliverance.cdt''': black screen pink border, reboot id13* '''Demon s Revenge.cdt''': "Searching 00" freeze* '''Des Chiffres et des Lettres.cdt''': reboot* '''Dick Tracy''': black screen id15 (ear), idFF (end of tape)* '''Dizzy 3 Fantasy World''': black screen* '''Dominator''': black screen pink border* '''Domino''': Rewind tape* '''Don't Panic''': no pause, freeze message "SEARCHING", id15 (ear) idFF (end of tape)* '''Dragon ninja''': welcome screen ok, message "128K MACHINE DETECTED" - "PLEASE WAIT" too long, slower than WinAPE id11 read (datalen=0 does ignore data read ?)* '''Dynamic Duo''': "Searching 00" freeze

[http://amstradE.eu/modules/newbb/viewtopicX.php?post_id=24592 Timings instructions Z80 sur CPC]I.T, Eagle AmstradVideoPlay, '''Eagle''', Edd the duck, Eden Blues, Egg Blitz, El Comecocos, El Cuerpo Humano, El equipo A (A Team), El Formamento, El Foso, El Misterio del Milo, El Prisionero (txt), '''El Secreto de la Tumba''', Electric Fencing, Electro Freddy, Elevator Action, '''Elven Warrior''', Emerald Isle (txt), Emilio Butragueno Futbol, Emlyn Hughes International Soccer, En Busca Del Arca De ma Alianza (txt), Encyclopaedia of War-Ancient Battles, Endurance, Enduro Racer (moto), Enigme a Oxford, '''Enterprise''', '''Equinox''', Escape-Edisoft, Escape from Khoshima (txt), Espacial, Espana-Comunidades Autonomas 1, Espionage, Espionage Island (txt), Euro Boss, Europa Teatro de Operaciones, European 2, European Champions, '''European Soccer Challenge''', Evening Star, Everyone s a Wally, Exolon, Exploring Adventure on the Amstrad (txt), Exterminator, Eye, E-motion, Echelon, El CID, El juego de la Oca, El Ladron del Sol Purpura, El Poder Oscura, Elektra Glide, Elidon, Emilio Butragueno 2, Emilio Sanchez Vicario Grand Slam, Empire, Enchanted, Endzone, European 5, Every Second Counts, Eye Spy

If interruption r52 is regular* '''Eddie Edwards Super Ski''': rewind tape* '''El Caldero Magic''': return to basic during game, even while making bad charset* '''El Capitan Trueno''': slow block load, reboot** on r005.8.16.8.2c12* '''El Gerente''': rewind tape* '''El Jabato''': blue screen, reboot* '''El Laberinto del Sultan''': rewind tape* '''El Tute''': after a continues MEM_WRcertain time doing nothing, interruption "Read error b"* '''Election''': black screen with blue border, message "LOADING: Please Wait"* '''Eliminator''': black screen with blue border* '''Elite''': "Searching 00", id15 (int<=ear), with somes id11 before and after it.* '1''Energy Warrior''': game launched but bad horizontal alignment* '''Er-bert''': "Press PLAY then any key"; end of tape idFF* '''Erik the Viking''' (txt) shall be taken into account above WAIT_n insertions ?: end of tape idFF, no key* '''Escape from The Planet Of The Robot Monsters''': welcome image OK, then black screen border green* '''Eswat-Cyber Police''': Cannot insert face B* '''Execution''': gray screen* '''Exploding Wall''': black screen red border* '''Explorer''': reset to BASIC* '''Express Raider''': yellow screen blue border, message "LOADING: Please Wait"* '''Extreme''': black screen blue border

In Z80 sequence diagramFantasia Diamond (txt), an IO_ACKFederation (+M1txt) is preceded by M1 , Feliz Navidad, '''Fernandez Must Die''', Ferry Captain, Fifth Quadrant, '''Feud''' (singleOK on r005.8.16.8.2c13), Fighter Pilot, Finders Keepers, Fire Ant, Firescape (txt), First Steps With The Mr Men, Flash, Flight Path 737, Flight Simulation, Fluglehrer, Flunky, Fly, Fly Spy, Football manager, Football manager III, '''Forbidden Planet''', Force 4, Forces, Formula 1 Simulator, Formula, Fourth Protocol, Frank Bruno s Boxing, Frank N Stein, Frankenstein (txt), '''Freedom Fighter''', Friss Man, Frontline, '''Frost Byte''', '''Fruity Frank''', Fu-Kung in Las Vegas, '''Fusion 2'''F-1, Fernando Martin Basket Master, Fiendish Freddy s Big Top O Fun, Firelord, First Past The Post, Five a Side Football, Football Champion, Footballer of the year I, Forgotten Worlds, Formula One, Frankenstein Jnr/Junior, Froggy, Fuego Curzado, Future Knight

cpctest.dsk -Timing Instruction- is different while using mode "MEM_WR=* '''F15 Strike Eagle''': black screen blue border, xFF (end of tape)* '''F16 Combat Pilot''': black screen blue border, xFF (end of tape)* '''F16 Fighting Falcon''': light gun game* '''F1 Tornado Simulator''': some vsync problem ?* '''FA Cup Football''': Rewind tape slow" and "MEM_WR=quick"face of tape OK* '''Fairlight 1 A Prelude''': Rewind tape* '''Fast Food Dizzy''': black screen, a dot* * on r005. Strangly better using "MEM_WR=quick"8.16.8.2c13* '''Fighter Bomber''': black screen pink border, reboot* '''Fighting Soccer''': black screen blue border, reboot* '''Fire and Forget 1''': Rewind tape, idFF (end of tape)* '''Firezone''': use right part of keyboard* '''Flash Gordon''': Read error b* '''Flying Shark''': Searching 00, strange id60 (end of tape). Rewind to 12* '''Football Director''': welcome picture not load completely, freeze, xFF (end of tape)* '''Football Frenzy''': Rewind tape* '''Football manager II''': welcome image and music, then Rewind tape* '''Football Manager World Cup Edition''': welcome screen, no more idFF (end of tape)* '''Footballer of the year II''': glitch* '''Freddy Hardest 1''': black screen blue border* '''Freddy Hardest 2''': reboot* '''Freestyle BMX Simulator''': black screen* '''Friday The 13th''': rewind tape at idFF (end of tape)* '''Fruit Machine Simulator''': black screen blue border* '''Fruit Machine Simulator II''': black screen, reboot

Current version is using "Z80_HACK=true" G-LOC R360, '''Galachip''' (parameter set during compilationspace invaders), that shunt Z80.WAIT_n entryGalletron, Garfield 1 & 2, Gauntlet-Micropower, Gazza s Super Soccer, GBA Championship Basketball 2 On 2, Z80.clock is slow down during theses WAIT_n. It'''Geasa-Parabola''', Gem, Geoff Capes Strongman, '''Ghost Hunters''', '''Ghostbusters 1''', Ghostbusters 2, Ghouls, Gilligan s Gold, Glass, '''Glen Hoddle Soccer''', Glider Rider, '''Golf Trophee''', Gorbaf El Vikingo, Graham Gooch s Test Cricket, '''Grand Prix 500cc''', Grand Prix Driver, Great Gurianos, Grell and Falla, Greyfell, '''Grid Trap''', Ground Zero, Guadalcanal, Guardian 2-Revenge of the only current way mutants, Guerre des galaxies, Guerrero Espacial, GunfighterGalaxia, Game Over I succeed in slowing down enough Timing Instruction - 1st., Gary Linekers s Superstar Soccer, Gauntlet II, Gems Of Stradus, Get Dexter 1 & 0, Go for unlocking Saboteur Gold, Grand Prix, Grand Prix Simulator 2 game., Grand Prix Tennis, Grange Hill, '''Green Beret''', Gregory Loses His Clock, Guardian Angel

Key games here are * '''Gabrielle''': Saboteur 2 Rewind tape* '''Galactic Conqueror''': Rewind tape, idFF (run fine with end of tape)* '''Galactic Games''': "MEM_WR=slowLOADING: Please Wait"* '''Galaxia SPANISH''': crash during play (when crashing on a wall : reboot)* '''Galivan''': black screen* '''Game Over II''': black screen orange border* '''Gauntlet I-The Deeper Dungeon''': nothing displayed* '''Gauntlet III''': welcome image, does freeze with no proposition to change tape side. At end of first tape I insert the second one... Not loading the 3rd tape.* '''Gauntlet''': reboot* '''Gazza II''': "MEM_WR=quickLoading error - Please retry"* '''Gee Bee Air Rally''': return to BASIC* '''Gemini Wings''': black screen pink border, id13 reboot* '''Ghost n Goblins''': Rewind tape* '''Gi Hero''': Searching 00 Loading 00...07 Rewind to 0C (to retry ?) * '''Gilbert-Escape From Drill''': glitch, and Arkanoid II (run fine then black screen* '''Gladiator''': Rewind tape* '''Golden Axe''': reboot id14* '''Golden Basket''': welcome image then reboot.* '''Goliath-Le Defi''': problem during load of welcome image* '''Golpe en la Pequena China''': no key* '''Grand Prix Circuit''': tape stopped with strange id value : 00* '''Grand Prix Master''': blue screen* '''Grand Prix Simulator 1''': idFF (end of tape)* '''Great Courts''': blocked by a password* '''Gremlins-The Adventure''': message "MEM_WR=quickResume a saved game ?"- no keyboard (same in WinAPE), too slow using "MEM_WR=slow"version ripped in 2018 in CPC-Power does run fine.* '''Gremlins 2''': reboot (Turbo Data + Standard Data)- running ok in WinAPE* '''Gryzor''': reboot (Turbo Data + Pure Tone + Sequence of Pulses)* '''Guillzemo Tell''': no keyboard, 4 Turbo Data, last one is big - running ok in WinAPE

[http://www.cpcwiki.eu/forum/programming/cpcHacker 2, Halls of Gold, Happy Letters, '''Happy Numbers''', Happy Writing, Hard Drivin, '''Hard Hat Mack''', '''Harricana-z80-commandsRaid International Motoneige''', Harrier Attack, Haunted Hedges (pacman), Haunted House (txt), Havoc, Hawk Storm version 64K, Heartland, Heathrow International Air Traffic Control, Heavy on the Magick (txt), Helicoptero 2000, Heliot, Helvera-Mistress of the Park (txt), Herberts Dummy Run, Here andThere With the Mr Men, '''Hero''', Hero of the Golden Talisman, Herobotix, Hexenkueche 1 & 2 (Cauldron), Hi-howQ Quiz, Hi Rise, High Moon, '''Highier''', Hijack, '''HMS Cobra''', Hobgoblin (GNG), '''Hold-longUp''', Holdfast, Hollywood Or Bust, Hollywood Palace, Home Runner, '''Hong Kong Phooey''', '''Hot Shot''', House of Usher, How To Be A Hero, Hunchback, '''Hundra''', Hunter Killer, Hustler, Hydrofool, '''Hyperbowl''', Hyperspace 4 (txt)Hacker 1, Hammer-theyHead, Hammer boy, Hercule-take/40/ CPC Z80 Commands and how long they take...]Slayer Of The Damne, Heroes of the Lance,, Hideous, Humphrey, Hunchback 1, Hunchback 2, Huxley Pig, Hypsys

==== Instruction timing * '''Hammerfist''': talk about r005.8white screen blue border, reboot while starting drawing welcome screen id13* '''Handicap Golf''': Rewind tape* '''Hanse''': Rewind tape while loading welcome screen* '''Hardball''': Rewind tape* '''Harvey Headbanger''': id11 id11 '''id12''' id13 - Sequence of pulses of different length - id9C (crash) + Searching 00.16c4 ====Rewind to 0DIn r005* '''HATE-Hostile All Terrain Encounter''': reboot* '''Having Fits Of Madness''': BASIC 1.81 - to retest in 6128 model version.16c3black screen green border.* '''Head Over Heels''': black screen with message "LOADING: Please Wait" id11 id11 '''id12''' (Pure Tone) id13 (crash)* '''Heavy Metal''': reset while loading welcome screen* '''Helichopper''': id19 - Generalized Data Block. Rewind to 03* '''Hero Quest''': black screen, I remark that WAIT_n are badly introduced following plustestmessage "level 12"* '''Heroes of Karn''': "LOADING ERROR" back to BASIC.dsk testbench * '''High Steel''': id11 id11 '''id12''' id13 id70 (WinAPEcrash). I corrected Rewind to 0A* '''Highlander''': message "LOADING: Please Wait" id11 id11 '''id12''' id00 (crash)* '''Highway Encounter''': message "LOADING: Please Wait" id11 id11 id12 id00* '''Histo-Quizz''': Rewind tape (after loading a T80 parameter firing the WRITE action 1 clock before. That unlocks 32 instructions timing in plustest.dsk testbench party) idFF (end of tape)* '''Hive''': id13 id2E (crash).Rewind to 02* '''HKM-Human Killing Machine''': reboot after a count down* '''Hockey''': idFF (end of tape), no keyboard* '''Hopper Copper''': Rewind tape (to retry ?)* '''Hoppin Mad''': Rewind tape (to retry ?)* '''Hostages''': welcome screen and freeze (tape stopped), no keyboard* '''Hot-Rod''': black screen pink border, reboot id14* '''How To Be A Complete Bastard''': white screen, blue border* '''Hudson Hawk''': grey screen, pink border* '''Hunter or Hunted''': Rewind tape* '''Hybrid''': id13 id7F (crash) "Searching 00"* '''Hydra''': black screen border blue* '''Hyper Sports''': welcome screen, and then nothing

In r005.8.16c4i alien, I remark that two WAIT_n are also needed by instructions using 5T during M1 cycle. But in fact the M1 signal is not outputing 4T while 4TIkari Warrior, but cutted at 2T. So that I do here Impossaball, Inca Curse - adventure B (experimentaltxt), I produce a M1 signal output Indigestion, Indoor Soccer, Inertie, Infernal Runner, Inquisitor-Shade of 3T while 5T. Detecting it that way in my WAIT_n generatorSwords, producing then needed Interchange, International Football, '''International Karate Plus''', International Manager, International Rugby, International Tennis, Into Oblivision, Into the Eagle s Nest, '''Invasion of the Zombie Monsters''', Invasores, Invierte y gana (manager), Invitation (txt), ISS-Incredible Shrinking Sphere, IznogoodIlogic All, '''Impossible Mission 1''', Impossible Mission 2 WAIT_n at this moment., Indoor Race, Inside Outing, Invasion, Isoleur, Italian Supercar, Ivan Ironman Stewart s Super Off Road

I don* 't know if plustest''i Ball 2 - quest for the Past''': Rewind to 8* '''i Ball''': Rewind to 7* '''Ice Breaker''': reboot* '''Imagination''': Rewind to 7* '''Impossamole''': "LOAD ERROR" level 1.dsk does pass on real AmstradA lot of id14* '''Indiana Jones 3''': black screen during second tape load* '''Indiana Jones 4''': Please rewind* '''Indiana Jones''': counter down : tape stopped in middle of id11 transmission, but it is a really great testbench to progress (without itnoise, r005reboot* '''Infiltrator''': message "LOADING: Please Wait", glitch idFF (end of tape) idem second tape.8.16c4 could * '''Infodroid''': reboot* '''Interdictor Pilot''': game not be realized)running - no key* '''Interieur''': "Rewind tape", end of tape id=FF* '''International 3D Tennis''': 64K version : reboot at begin of welcome image.* '''International Karate''': reset to BASIC* '''International Speedway''': rewind to 15 - great for comparative speed test :)* '''It s a Knockout''': message "LOADING: Please Wait" id14* '''Italia 90 World Cup Soccer''': "WARNING" message, reboot* '''Italy 1990''': game not launched despite of inserting face B

During this workJack and the beanstalk, I remark an instruction that seems badly classified on plustest.dsk : 2A LD HLJack the Nipper II, Jackson City, Jail Break, Jammin, Jet-Boot Jack, Jet, Jet Set Willy-the final frontier (nnpassword needed). This instruction does not use MEM_WR and is not a 5T M1 instruction. So it shall be using 4 NOPs instead , '''JetPac''', Jeux de Kim, Jigsaw Rescue, Jimmy Business, Jimmy s Soccer Manager, Jinks, Jocky Wilson s Compendium of 5 NOPs. LD (nn)Darts, HL does take 5 NOPs '''Jocky Wilson s Darts Challenge''', Joe Blade I, Joe Blade II, Joe Blade III, Johnny Reb II, Jolly Poppa Down (because it does use MEM_WR instructiontxt), as in plustest.dsk testbench here for this instruction.Jolly Roger s Dungeon Escape, Jonah Barringtons Squash, '''Jonny Quest''', Juggernaut, Jump, Jump Jet, Jumper, Jumpman, Jungle Warrior, JustinJack Nicklaus Golf, Jai Alai,

===== Tests on real CPC (by DanyPPC) =====* '''Jack the Nipper I''': game not launched. xFF, still at welcome screen.[http* '''Jackal'''://wwwgrey screen, then reset* '''Jahangir Khan World Championship Squash''': "Tape Loading error.cpcwiki.eu/forum/amstrad-cpc-hardware/need-plustest-dsk-testbench-5-output-on-original-cpc-6128/ CPCWiki."* '''James Clavell s forum Shogun''': Need plustest.dsk testbench 5 output on original CPC 6128]id11 6 times then '''id10'''* '''James Debug dans Le mystère de l'Ile Perdue''': joystick misunderstood* '''Jaws''': id11 4 times then '''id10''' - "Rewind to 04"* '''Jet Bike Simulator''': id13 pure data, pure tone, loop* '''Jet Set Willy II''': Rewind tape (all id11)* '''Johnny Proot II''': Rewind tape (end of tape idFF, all id11)* '''Jungle Jane''': blue screen, idFF (end of tape)* '''Jungle Warfare''': game auto launched, no joystick/keyboard

So 2A is really during 5 NOPs... perhaps MEM_rd has to be slow down with one WAIT_n like for MEM_wr. Perhaps in this case 5TK Y A, '''Kane''', Karl s instruction has not to be slow down. I have to fork r005.8.16c3 to test that. - update : in schematic GateArray does not has "MEM_wr wire" Treasure Hunt, Kart 3000, Kat Trap, Ke Rulen Los Petas (but MEM_req and RDtxt), so can deduce WR'''Kenny Dalglish Soccer Manager''', but in an evil brain's way) - update 2 : all tests failed except one in testbench using this way''Kenny Dalglish Soccer Match''', perhaps because RFSH_n does also use MREQ_n during M1 cycle. Perhaps WAIT_n generator can detect the current OP Code fetched Kentilla (this is conform to [http://www.google.com/patents/US5313621 Patent US5313621 : Programmable wait states generator for a microprocessor and computer system utilizing it ]txt). , Kentucky Racing, Kick off II, '''Killapede''', Killer Cobra, Killer Gorilla, Killer Ring, King Leonard, Klax, Knight Ghost, Knight Lore, Knight Orc, Knight Tyme, Knightmare, Knights and Demons, Kobayashi Maru, Kokotoni Wilf, Kong s Revenge, Krakout, Kung- update : principe of concept validated for one instruction (2A)Fu Master, I can slow down instructions one per one'''Kwik Snax''', I donKYAKarnov, '''Kung-fu'''* '''Kaiser''': Rewind tape* '''Kettle''': reset id11, id13 not reached* '''t know why Kick off I had to insert two WAIT_n instead of one here''': Rewind tape* '''Killed Until Dead Murder At Midnight''': id11, but its results a plustest.dsk testbench with 2A instruction validatedid11, that's done on r005.8.16c5f5 (candidate 5 fork 5id12 id13), but I have several times* '''Kinetik''': "Rewind to revert it to r005.8.16c3f5 I think before going further.03"* '''Knight Force''': Rewind tape* '''Knight Games''': id13* '''Knight Rider''': id13* '''Konami s Golf''': id13* '''Kong Strikes Back''': id13* '''Kotoran s Shadow''': invalid CDT format* '''Kristal''': Rewind tape

About testbench border effectsL'Affaire Sydney (txt), I think that IO_ACKed instructions has to be under same rules L'Affaire Vera Cruz (MEM_wrtxt), modulo 4 etcL'Anneau de Zengara, L Hepiss, La Armadura Sacradda De Antiriad, La Aventura Original (txt) , La Caza del Octubre Rojo, La Chose De Grotemburg (txt), La course a la boussole, La foret Infernale, La France, La Geste D Artillac (txt), La Guerra de las Vajillas (txt), La Trilogie du temple d Apshai, La Ville Infernale, Labyrinth Hall (txt), Langolo del Diavolo, Las Joyas Del Nio, Las Vegas Video Poker, '''Laser''', Laser Blast, Laser Tiempo, Le 5eme Axe, Le Bagne De Nepharia (txt), Le Diamant de l Ile Maudite (txt), Le jeu du Roy, Le Millionnaire, Le spectre d'Anubis (txt), Le Survivant, Le Talisman d Osiris, Le Tour du Monde en 80 jours (txt), Le Tournoi du Siecle, '''Le Tresor de l Amazone''', League Challenge, Legend, Lenguaje, Les aventures du KA- update Menace sur l Arctique, '''Les Diamants de la Peur''', Lettura Rapida, Life Expectancy Zero, Lifeterm (txt), '''Light Force''', Linkword-French, Logiformes, Lop Ears, Lords, Lords of time (txt), Lorna, Los Angeles Swat, Los Pajaros De Bangkok (txt), Los Planetas-El Sistema Solar, Los Templos Sagrados (txt), '''Lost Caves and the Tomb of Doom''', Loto, Lotus Turbo Esprit, Lucky FruitsL Heritage-Panique a Las Vegas, Lee Enfield Space Ace, Little Puff in Dragonland, Lords of Chaos* '''L oeil de Set''': rewind tape* '''La Abadia del crimen''': blue screen and grey border* '''La Malediction de Thaar''': rewind tape idFF* '''La Tour Fantastique''': rewind tape* '''Lala Prologue''': black screen* '''Las Vegas Casino''': Read error B (too quick)* '''Last Duel''': count down, reset* '''Last Ninja 2''': glitch, id14 reboot* '''Le Necromancien''': red screen, blue border* '''Leader Board''': id12 freeze* '''LED Storm''': black screen, rewind at start of block.* '''Lemmings''': no welcome image* '''Les aventures de Jack Buron-big troube in little china''': no keyboard* '''Les Joyaux de Babylone''': "ERREUR CASSETTE"* '''Leviathan''': reset at id14* '''Line of Fire''': inserting second side does nothing* '''Live and Let Die''': black screen idFF (end of tape)* '''Living Daylights''': same result problem than in testbench using this way.dsk version* '''Lords of Midnight''': welcome image, then freeze

==== Instruction timing Mach 4, '''Mach 3''', Macrocosmica, Mad Mix Game, Mad Mix Game 2, Magic Clock, '''Magical Drop CPC''', Manager, Mansion Kali 1 (txt), Mansion Kali 2 (txt), Mantis 1 (txt), Mantis 2 (txt), Mapa del Cielo, Master Chess, Match Point, Mathasard, Mathe Stunde 1, Max, Meltdown, Mercenaire, Mexico 86, Minas, Misil Atack, Missile Ground Zero, Missiles, Molecule Man, Money Molch, Monster of Murdac, Monty Mutant, '''Monument''', Mordon s Quest (txt)Mariano The Dragon In Capers In Cityland, Marius Tresor Foot, Masters of the Universe, Mathex n1, Maziacs, Megacorp, Meganova, Message from Andromada (txt), Miami Cobra GT, Microprose Soccer* '''M enfin''': talk about r005sound freeze during welcome picture* '''Mahjong''': Rewind tape* '''Manic Miner''': crash after loosing one time.8.16c20 ====I try on this version * '''Mansion''': Rewind tape during first mission* '''Marble Madness-Deluxe Edition''': blue screen* '''Marsport''': password* '''Master of the lamps''': Rewind tape* '''Matchday 2''': black screen blue border* '''Mercenary Escape from Targ''': welcome screen, no keyboard* '''Mercs''': reboot* '''Metropol''': back to get an intelligent IO_ACKbasic at first round of play* '''Miami Vice''': in JavaCPC instructions just has * '''Michel Futbol Master Super Skills''': reboot* '''Mickey Mouse''': reboot* '''Micro Sapien''': Rewind tape* '''Mike Head S Computer Pop Quiz''': menu without keys* '''Mineur''': Read error a fixed time (array of instruction timing) and IO_ACK does * '''Mobile Man''': reboot* '''Monopoly''': grey screen* '''Montsegur''': reboot* '''Moonblaster''': game not influence on them. So IO_ACK perhaps has to remove one WAIT_n inserted by GateArray.launched

I don* * 't understand why I have to add 2 WAIT_n when 1 WAIT_n seems suffisant''Breaking Baud.cdt''': no pause, I think there is some problem around my last part "PLEASE_WAITpink floral" component (hack heart is missing. As explain at begin of T80's WAIT_n entry)demo, perhaps finally T80's WAIT_n entry is fineinstructions are executed during they are written in memory, as finally I just insert a certain number speed of WAIT_n during second clock tape against speed of M1, MEM_wr slow is unvalidated : Gatearray of Amstrad doesn't have the needed "WR" wire, soZ80...

Next step shall be destroying ===On ZX-Uno FPGAmstrad version===Games that doesn't run are :* '''adios_a_la_casta.dsk''': bad sound. Does pass hacking memory banks this way : else b"PLEASE_WAIT1100" component I think, in order to add when RAMbank="100" and (A(15)='0' and A(14)='1 WAIT_n ') else b"1101" when RAMbank="101" and not 2 with my WAIT_n generator(A(15)='0' and A(14)='1') else b"1110" when RAMbank="110" and (A(15)='0' and A(14)='1') else b"1111" when RAMbank="111" and (A(15)='0' and A(14)='1') else b"10" & A(15 downto 14); -- default value* '''Ghouls'n'Ghost.dsk''': black screen during game. RAM is not relaxed enought to permit changing address just after knowing if Z80 does a read or a write (ROM written=> does write on RAM hidden behind)

=== Test of a real Zilog 80 ===[[File* '''jdva6.dsk''':Z80fx2bbno keyboard.jpg]]Code name .. [https: Z80fx2bb, real Z80@2MHz (instead of 4MHz) on fx2bb extension card//github.com/renaudhelias/RubikCubePaletteCPC/tree/master/JDVA%236_test JDVA#6 test]

[[http: Antonio Villena mail "ZXDOS conversion of your CPC core" 2019/01/www29 Hi Renaud It's for asking if you plan a conversion of your CPC core for this platform.youtubeIt's like ZX-Uno, but with: -A bigger FPGA, LX16 instead LX9.com -18 bit DAC -32Mb of SDRAM, also 512K of SRAM -dual joystick port -Separate PS/watch?v=YYnvkR5v3D0 http2 joystick and mouse If you are interested I can provide the two addon boards, so you only need the LX16 board. Bought from Aliexpress is about 18 EUR. https://wwwes.youtubealiexpress.com/watch?v=YYnvkR5v3D0]]store/product//606998_32818384452.html Regards

For it I plug all wires simply from 1 to 40== Effort done ===== VGA ===Pixels and VRAM. Palette and rasters. Some wires are cutCRTC0==== VGA: CRTC0 ====CRTC0 seems the best one, some are Vcc, others GND. Z80 output are directly connected, Z80 input are pull-up with red-red-red resistors demo does cry when detecting a poor CRTC1 (I like red), Z80 is powered 5v (pmod can give 5v using jumperCRTC1 seem a low cost version of CRTC0). In fact z80 is so old component that powering it 5v does output 3I have to implement a CRTC0 instead of my current CRTC1..3v.

In fact CRTC1 is the only difference between [[T80]] of opencore and real Z80 best one. CRTC2 is that [[T80]] runs on rising_edge, and Z80 runs during the low statecost version. Test past with little modification of sequencer forcing it to do nothing during low state of z80, resulting a downclock (memory is too overclocked with this sequencer modification), perhaps using buffer on address bus and data bus could solve this detail... but as it runs for me it is not a problemCRTC0 did appears before CRTC1.

[http://wwwDone in r005.cpc-power8.com/index14.php?page=detail&num=12883 CPCDetected as CRTC0 by WakeUp! -Power Z80 FULL TEST (UK) (2012) - UTILITAIRE]"Enjoy the show" message displayed.

Some errors detected in In r005.8.4 (test done by Philippe D15.WakeUp! (CRTC0/MEM_wr quick)detected as Emu first time, and after a quick reset, does say detected as CRTC0.

[http://wwwIn ZX-Uno FPGAmstrad, I implemented CRTC0.winape.net/download/plustest.zip WinAPE plustest.zip (including Instruction and Interrupt timing tests)]

===== Z80 architecture =========== aCRTC1 has double sized VSYNC against CRTC0 (moustache test) T80.vhdl ======17 pages of source codes to read.

Not analyzed yet completly==== VGA: VRAM ====ram_palette.

Contains the main workflow of Z80: current MCycle VRAM contains 800x300 amstrad pixels (VZoom x2), displayed VGA 800x600@72Hz with fix regular border at 768×576 and its current TStatefix inside border at 768×544.

Contains T80_ALU.vhdl and T80_MCode.vhdl componentsIn ZX-Uno, VRAM contains 800x300 amstrad pixels (VZoom x2), displayed 640x480@60Hz, with vertical only border.

====== b* simple_GateArrayInterrupt.vhd (GA to VRAM) T80_ALUparameters : VRAM_Hoffset/VRAM_Voffset* aZRaEL_vram2vgaAmstradMiaow.vhdl ======vhd (VRAM to VGA) parameters : H_BEGIN/H_END/V_BEGIN/V_END (theorical fixed values)6 pages To calibrate : VRAM_Hoffset++ does offset one char left. VRAM_Voffset++ does offset one line up. On display H_BEGIN does begin to scan lines of source codes VRAM. But V_BEGIN does not enter in consideration here : vertical=0 does begin to readscan columns of VRAM.

Not analyzed yet completlyIn original CPC, top border has 1/2 char more than bottom border. This analyse can certainly be wrong : wipI used Batman Forever default welcome/calibration screen to calibrate VRAM offsets. On ZX-Uno I used Arkanoid to calibrate VRAM offsets.

Contains flags : C N P X H Y Z S C : carry - set if result did not fit in RAM_palette contains the register N : negative? - last instruction was substract P : parity or overflow - overflow example : signedink list and the mode for each line of VRAM, 7F+7F=FE with overflow setted X : undocumented H : half carry - set if 4bit first bits sampled at horizontal middle of result did not fit in the register Y : undocumented Z : zero - set if result is zero S : sign - it is an input ?Contains ALU_Op : [ADD ADC SUB SBC AND XOR OR CP] ROT BIT [SET RES] DAA800x600 screen, and used at begin of each line.

[[http://wwwAdding choice of CRTC 0 or 1 on OSD, and passing this test could be great.z80.info/decoding.htm § Disassembly tables]] shall make a cool ALU_Op quick reference card, doesn't it ?

====== c) T80_MCode.vhdl ==VGA: TODO : winape testbench ====First 5 pages, and last 2 pages of source codes to read. Others pages are "always the same" architectually speaking.'''winape testbench: plustest'''

Gives instructions lengh : MCycles, TStates Using winape testbench (please remark the 's' at end of theses words...plustest), in [[http://www.zilog.com/docs/z80/um0080.pdf Z80 doc]] each instruction is timing described using "M Cycles" and "T States" vocabularytest 2 does show somes problems while border does go out of screen, negative border does hide line itself.

It's a "controler" (proof : you have some Set_*_To outputs), does gives orders to T80_ALU=== bootloader ===SDCARD and RAM.vhdl throw T80.vhdl

Actions of this controler are :* ALU_Op : the action !* I_DJNZ I_CPL I_CCF I_SCF I_RETN I_BT I_BC I_BTR I_RLD I_RRD I_INRC : actions not for ALU (wiring input/ouputnothing to say here, changing flags...)* Save_ALU/PreserveC : an option about register "erased or not" at next instructionInstructions not coded in T80_MCode.vhdl but in T80.vhdl (strange, barbarian part of code really ???) :* Jump/E/XY Call RstP LDZ LDW LDSPHL Special_LD ExchangeDH/Dp/AF/RS

===== Some bad instruction timing analysis =====Based on [[httpGA://www.winape.net/ WinAPE>download>Plus test>plustest.dsk]] testbench, mapped using [[http://clrhome.org/table/ Z80 instruction set - ClrHome]], instruction described then in [[http://www.zilog.com/docs/z80/um0080.pdf Z80 doc]], against [[http://www.winape.net/ WinAPE]] passing testbench timing.{| classalignment of HSYNC Interrupt ="wikitable"|-! Hex !! Inst !! CPC timing !! MEM_wr:quick !! MEM_wr:slow !! remark|-| 02 || LD (BC), A || 2 || || 3 || Fixed on r005.8.16c3|-| 10 || DJNZ, e || 4/3 || 4/2 || 4/2 || T States begin by "(5, " : M1 is longer than 4.Seems adding also one Wait_n in this case (as about MEM_wr)|-| 12 || LD (DE), A || 2 || || 3 || Fixed on r005.8.16c3|-| 22 || LD (nn), HL || 5 || 4 || 6 || Fixed on r005.8.16c3|-| 2A || LD HL, (nn) || 5 || 4 || 4 || MEM_WR not used by here,it seems correct following doc : 4+3+3+3+3=16, 16/4=4.Damn.|-| 32 || LD (nn), A || 4 || || 5 || Fixed on r005.8.16c3|-| 34 || INC (HL) || 3 || || 4 || Fixed on r005.8.16c3|-| 35 || || 3 || || 4 || Fixed on r005.8.16c3|-| 36 || || 3 || || 4 || Fixed on r005.8.16c3|-| 70 || || 2 || || 3 || Fixed on r005.8.16c3|-| 71 || || 2 || || 3 || Fixed on r005.8.16c3|-| 72 || || 2 || || 3 || Fixed on r005.8.16c3|-| 73 || || 2 || || 3 || Fixed on r005.8.16c3|-| 74 || || 2 || || 3 || Fixed on r005.8.16c3|-| 75 || || 2 || || 3 || Fixed on r005.8.16c3|-| 77 || || 2 || || 3 || Fixed on r005.8.16c3|-| C0 || RET nz || 2/4 || 2/3 || 2/3 || RET cc, inverse of RET z.|-| C4 || || 3/5 || || 3/6 || Fixed on r005.8.16c3|-| C5 || PUSH bc || 4 || 3 || || PUSH qq (same as F5), ok using MEM_wr:low|-| C7 || RST 00h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3. T States begin by "(5, " : M1 is longer than 4.|-| C8 || RET z || 4/2 || 3/2 || 3/2 || RET cc, it seems correct following doc: true@5+3+3=>3*4; false@5=>2*4.T States begin by Interrupt are respected since version "(5, candidate 001" : M1 is longer than 4.|-| CC || || 5/3 || 5/3 || 6/3 || Fixed on r005.8.16c3|-| CD || || 5 || || 6 || Fixed on r005.8.16c3|-| CF || RST 08h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3|-| D0 || RET nc || 2/4 || 2/3 || 2/3 || RET cc, inverse of RET c.|-| D4 || || 3/5 || || 3/6 || Fixed on r005.8.16c3|-| D5|| PUSH de || 4 || 3 || || PUSH qq (same as F5)FPGAmstrad, ok using MEM_wr:low|-| D7 || RST 10h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3|-| D8 || RET c || 4/2 || 3/2 || 3/2 || RET cc|-| DC || || 5/3 || || 6/3 || Fixed on r005.8.16c3|-| DF || RST 18h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3|-| E0 || RET po || 2/4 || 2/3 || 2/3 || RET cc, inverse of RET pe.|-| E3 || || 6 || 5 || 6 || Fixed on r005.8.16c3|-| E4 || || 3/5 || || 3/6 || Fixed on r005.8.16c3|-| E5 || PUSH hl || 4 || 3 || PUSH qq (same as F5), ok using MEM_wr:low|-| E7 || RST 20h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3|-| E8 || RET pe || 4/2 || 3/2 || 3/2 || RET cc|-| EC || || 5/3 || || 6/3 || Fixed on r005.8.16c3|-| EF || RST 28h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3|-| F0 || RET p || 2/4 || 2/3 || 2/3 || RET cc, inverse of RET m.|-| F4 || || 3/5 || || 3/6 || Fixed on r005.8.16c3|-| F5 || PUSH af || 4 || 3 || || PUSH qq, 5+3+3=11<3*4, is MEM_WR prologation effective two times here 1T+1T?yes: pushing Markus does help me a register pair here, ok using MEM_wr:low|-| F7 || RST 30h || 4 || 3 || 3 || RST plot about it. Fixed on r005.8.16c3|-| F8 || RET m || 4/2 || 3/2 || 3/2 || RET cc|-| FC || || 5/3 || || 6/3 || Fixed on r005.8.16c3|-| FF || RST 38h || 4 || 3 || 3 || RST p. Fixed on r005.8.16c3.|-|}

CC codes [[File: all ok DD codes : somes ko ED codes : somes ko FD codes : somes ko DD CB codes : all ko FD CB codes : all koJavaCPC_running_norecess.jpg]]

r005.8.16c4 results :JavaCPC running norecess's "using-interrupts" code [[Filehttp:FPGAmstrad plustest5 r005.8.16c4 part1.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c4_part1]][[File:FPGAmstrad plustest5 r005.8.16c4 part2//norecess.png|thumbnail|FPGAmstrad_plustest5_r005cpcscene.8net/using-interrupts.16c4_part2html]]

r005.8.16c6 results :[[File:It could be interesting to test this asm code on next version of FPGAmstrad plustest5 r005.8.16c6 part1.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c6_part1]][[File:FPGAmstrad plustest5 r005.8.16c6 part2.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c6_part2]]

===== Some bad instruction analysis =GA: Sniffing of a real Amstrad ====Based on [[httpsFile://cpcrulezcpc_plus_m1.fr/applications_CPM-util-zexall.htm Zexall: Z80 instruction set exerciserjpg]], running fine in JavaCPC.====== ED A9 cpd(r) / ED A1 cpi(r) ======Problem here Code name: CPDR and CPIR has same implementation than CPD and CPI.Raptor

=== Alignment I listen to some wires of my Amstrad CPC 6128 plus, but I can't access VSYNC/HSYNC Interrupt ===Interrupt are respected since version "candidate 001" output of FPGAmstradCRTC, so I have to buy another model in order to do this test.In fact you can listen at clock of Amstrad and transmit it to FPGA DCM component, resulting a accelerated clock sequence, that's it, with FPGA DCM you can overclock output Amstrad clock signal in order to insert more operations, I use this tip for listening signals and save them inside starter kit asynchronous RAM (write, stop write, write, stop write... I’m a perfectionist paranoid...)

[[File:JavaCPC_running_norecessYou can power Amstrad CPC using extension port, applying 5v. By doing it, power down button of Amstrad doesn’t run. Using this way you reach a common 5v power between starter-kit and Amstrad. I connected wires from extension port directly to FPGA, as they are used just for listening.jpg]]

JavaCPC running norecess's "using==== GA: WAIT_n generator -interrupts" code [[http://norecesscurrently in r008.cpcscene5.net/using-interrupts14 ====Instruction timing.html]]

It could be interesting I tested instruction timing of [[T80]] compare to test this asm code instruction timing of JavaCPC emulator. I deduce synchronization of Z80 with CRTC on next version M1 signal by WAIT_n insertion in order to have a multiple of FPGAmstrad4 Tstates per instruction.==== TODO : arnoldemu I deduce also one WAIT_n inserted during MEM_WR operation (yes I log testbench - cpctest ====[http://www.cpcwiki.eu/forum/emulators/amstrad-cpc-%27acid%27-test/ forum : amstrad cpc "acid" test] => ''I have uploaded updated tests : [http://cpctech.cpc-live.com/test.zip http://cpctech.cpc-live.com/test.zipT80]]'', I’m crazy)

Tests done here : ppi/psg/cpctestI just made a test bench log of [[T80]] (log of instruction's M1, and first M1 coming after knowing that I send a lot of NOP after my instruction), and compare it to a JavaCPC timing array. Some instructions was not tested (interrupt wait, and special timing (instructions with change timing)), but all others passed correctly.

[[File:arnoldemu_testbench_CPCTEST-r005-6MEM_WR has an OSD menu choice to switch between "quick" and "slow", "slow" mode does insert ONE WAIT_n during detection of MEM_WR. This switch exists because somes games are running in "slow" mode and others in "quick" mode.png]]

In r005.6An elegant fork by Sorgelig, I reach successfully some arnoldemu tests to calibrate more efficiently HSYNC interrupt sum up nicely the "MEM_WR: ppislow" algorithm + the HACK_Z80 flag of r008.bin, psg5.bin, cpctest14 : T80pa CPU ( (.bin..) .cen_p(ce_4p & (WAIT_n | no_wait)), .wait_n(1) // (cyc1MHz | (IORQ_n & MREQ_n) | no_wait) ); // Current WAIT_n generation is not correct! // It should use WAIT_n instead (see commented out code above ^^) reg WAIT_n; wire acc = (MREQ_n | ~RFSH_n) & IORQ_n; always @(posedge clk) begin reg old_acc; if(ce_4p) begin old_acc <= acc; if(old_acc & ~acc) WAIT_n <= 0; if(cyc1MHz) WAIT_n <= 1; end end

Games unlocked by r005.6 ==== GA: Sigma7, PacWAIT_n generator -land, Golden Tailtalk about r008.5.14 ====

In r005.8fact it exists several instruction making MEM_wr, Prehistorik is running fineand adding each one ONE WAIT_n does result in different case of synchronization.

In r005[http://www.8cpcwiki.4, arnoldemu testbench "cpctest" does fail :eu/forum/emulators/cpc-z80-timing/CPC Z80 timing]

In r005If it's about managing GA reading pixels, perhaps not only M1 signal are synchronized but also the MEM_RD and MEM_WR accesses at another offset.8.7, arnoldemu testbench "cpctest" is OK

In r005.8.14 version, using default mode "MEM_wr[http:quick", is OK//amstrad. And Prehistorik II is running fineeu/modules/newbb/viewtopic.php?post_id=24592 Timings instructions Z80 sur CPC]

If interruption r52 is regular, even while making a continues MEM_WR, interruption (int<===== TODO : arnoldemu testbench - crtctest =====Adding choice of CRTC 0 or '1 on OSD, and passing this test could ') shall be great.taken into account above WAIT_n insertions ?

=== ram_palette ===VRAM contains 800x300 amstrad pixels In Z80 sequence diagram, an IO_ACK(VZoom x2+M1) is preceded by M1 (single), displayed VGA 800x600@72Hz with fix regular border at 768×576 and fix inside border at 768×544.

* simple_GateArrayInterruptcpctest.vhd (GA to VRAM) parameters : VRAM_Hoffset/VRAM_Voffset* aZRaEL_vram2vgaAmstradMiaow.vhd (VRAM to VGA) parameters : H_BEGIN/H_END/V_BEGIN/V_END (theorical fixed values)To calibrate : VRAM_Hoffset++ does offset one char left. VRAM_Voffset++ does offset one line up. On display H_BEGIN does begin to scan lines of VRAMdsk -Timing Instruction- is different while using mode "MEM_WR=slow" and "MEM_WR=quick". But V_BEGIN does not enter in consideration here : verticalStrangly better using "MEM_WR=0 does begin to scan columns of VRAMquick".

In original CPCCurrent version is using "Z80_HACK=true" (parameter set during compilation), top border has 1/2 char more than bottom borderthat shunt Z80. WAIT_n entry, Z80.clock is slow down during theses WAIT_n. It's the only current way I used Batman Forever default welcome/calibration screen to calibrate VRAM offsetssucceed in slowing down enough Timing Instruction for unlocking Saboteur 2 game.

RAM_palette contains the ink list Key games here are : Saboteur 2 (run fine with "MEM_WR=slow", does freeze with "MEM_WR=quick") and the mode for each line of VRAMArkanoid II (run fine with "MEM_WR=quick", sampled at horizontal middle of 800x600 screen, and used at begin of each line.too slow using "MEM_WR=slow")

=== Sniffing of a real Amstrad ===[[Filehttp: cpc_plus_m1//www.cpcwiki.eu/forum/programming/cpc-z80-commands-and-how-long-they-take/40/ CPC Z80 Commands and how long they take...jpg]]Code name: Raptor

I listen to some wires of my Amstrad ==== GA: WAIT_n generator - plustest-5 - Tests on real CPC 6128 plus, but I can't access VSYNC(by DanyPPC) ====[http:/HSYNC output of CRTC, so I have to buy another model in order to do this test/www. In fact you can listen at clock of Amstrad and transmit it to FPGA DCM component, resulting a accelerated clock sequence, thatcpcwiki.eu/forum/amstrad-cpc-hardware/need-plustest-dsk-testbench-5-output-on-original-cpc-6128/ CPCWiki's it, with FPGA DCM you can overclock output Amstrad clock signal in order to insert more operations, I use this tip for listening signals and save them inside starter kit asynchronous RAM (write, stop write, write, stop writeforum : Need plustest... I’m a perfectionist paranoid...) dsk testbench 5 output on original CPC 6128]

You So 2A is really during 5 NOPs... perhaps MEM_rd has to be slow down with one WAIT_n like for MEM_wr. Perhaps in this case 5T's instruction has not to be slow down. I have to fork r005.8.16c3 to test that. - update : in schematic GateArray does not has "MEM_wr wire" (but MEM_req and RD, so can power Amstrad CPC deduce WR, but in an evil brain's way) - update 2 : all tests failed except one in testbench using extension portthis way, applying 5vperhaps because RFSH_n does also use MREQ_n during M1 cycle. By doing Perhaps WAIT_n generator can detect the current OP Code fetched (this is conform to [http://www.google.com/patents/US5313621 Patent US5313621 : Programmable wait states generator for a microprocessor and computer system utilizing it]). - update : principe of concept validated for one instruction (2A), power I can slow down button instructions one per one, I don't know why I had to insert two WAIT_n instead of Amstrad doesn’t run. Using this way you reach one here, but its results a common 5v power between starter-kit and Amstradplustest. dsk testbench with 2A instruction validated, that's done on r005.8.16c5f5 (candidate 5 fork 5), but I connected wires from extension port directly have to FPGA, as they are used just for listeningrevert it to r005.8.16c3f5 I think before going further.

In r004, you have more RAM +512KB, ==== GA: WAIT_n generator - plustest-9 - Tests on real CPC (by GUNHED and you can add ROMs.Kris) ====* LowerROM has [http://www.eZZ file extension* UpperROM has cpcwiki.e00 ot eFF file extension (hexa)eu/forum/amstrad-cpc-hardware/need-plustest-dsk-testbench-9-output-on-original-cpc-6128/ CPCWiki's forum : Need plustest.dsk testbench 9 output on original CPC 6128]

In r005.4GUNHED results : System 1: CPC6128, I add another UpperROM set CRTC2: .f00 to .fFF file extension (hexa). If you press Test 9 works normal until the &EC codes, there are two errors marked with an "spaceX" during . &ED, &46: 2 &ED, &4E: 2 After &ED, &5D it suddenly stops working! System 2: 6128 Plus: &ED, &46: 2 &ED, &48 5 &ED, &49: 5 &ED, &4E: 2 &ED, &50: 5 &ED, &51: 5 &ED, &58: 5 &ED, &59: 5 After &ED, &5D it suddenly stops working! Probably a reset_key crash, since a spot appears on screen.Kris results : Here are my results ("page up" keyteste performed on CPC 6128 CRTC 1), upperROM files used range from Pictures of each screen attached in the .f00 to rar file.fFF instead of ranging from (.e00 to .eFF. LowerROM )In pictures of Kris, after ED5D, it does stop also.eZZ file extension is still used Only ED test part has some failings :* ED46:C* ED4E:CIn WinAPE (by default CPC 6128 CRTC1), ED test does finish its screeen result, with several fails :* ED46:2* ED4E:2* ED66:2* ED6E:2Others screens results after does pass. Relaunching once again in both caseWinAPE, same results.

==== TODO GA: RAM 4MB extension WAIT_n generator - RET cc and WAIT_n timing analysis ====IO_ACK offset into INT (interrupt) should not implicated by WAIT_n generator, and it seems that a WAIT_n during T2 is ignored because of autowait already inserted at this moment... for synchronizing an IO_ACK, I have normaly to insert WAIT_n during T2+2. No way, instruction itself is synchronized, so IO_ACK is synchronized also, you don't have to insert WAIT_n during T2+2.

Why http://www.cpcwiki.eu/forum/emulators/cpc-z80-timing/ : ~ a WAIT_n does not use RAM access, so does not slow down a "CPC instruction" (hypothesis) - but what about an IO_ACK during NOP in this case ?

http://www.cpcwiki.eu/forum/programming/cpc-z80-commands-and-how-long-they-take/30/ So, it's more correct to not think of it stretching the M cycle, but instead not starting the next one that requires a memory access until the 4th cycle. If you think of it like this, it also explains the weird exception that happens for interrupt handling. Normally, responding to an interrupt adds 1us on the CPC. That's because it actually just adds 2 T states for the interrupt acknowledge before the next instruction fetch. However, in case where the last M cycle takes 6 T states, the interrupt acknowledge doesn't delay the instruction prefetch and so the usual 1us delay doesn't occur. "Simples!" - ralferoo(4T equals 1us equals 1 NOP ==== PWM ====> modulo 4 synchronization of M1)

Using So you slow down instructions following a simple [[PWM]], data is entered at a certain speedslowing down instruction table, slowing it the [[PWM]] clock speedless you can, and then IO_ACK comes or not, and then you synchronize next M1 putting WAIT_n during T2 modulo 4. IO_ACK two autowaits are not prolongated.

If you simulate a constant [[PWM]] output signal at middle range ralferro explains also that stretching instruction timing depends of voltage (state just between 0V and 5V : 2memory used or not by instruction.5VI know that Amstrad schematics does not use the MEM_WR wire. So it could be hard to deduce if they added 1 or more WAIT_n for certain instructions. But I'm more about 1 WAIT_n inserted at maximum each time (it's more easy to hard implements), it and the modulo 4 synchro, let's see results an alternance of 0V my current experiment (comparing time instruction of Z80 and 5V, that result in a noise soundplustest. In Arkanoiddsk testbench, this defect make some continues sounds instead deducing diff table of silents..."slowing down instructions")

My idea is generating a sound having a frequency upper than dog ultra sound==== GA: WAIT_n generator - talk about r005.8.16 ====OSD menu has now "WAIT_n:slow|quick", while I want to simulate a constant WAIT_n generator is implemented adding 0, 1 or 2.5VWAIT_n per instruction.

For this I do use two clocks entries revisited the edges of WAIT_n generator, to insert WAIT_n at 2T (like explain in my [[PWM]] : one about data entryZ80 doc), and another about algorithm executionso normaly it is retro-compatible with official T80. Doing this way I can set HACK_Z80 flag at false (T80.WAIT_n is now used in r005.8.16)

This result a high quality sound output (in addition to I also removed the edge detection of IO_ACK on gatearray, replacing it by state detection of IO_ACK, resulting cpctest's testbench back : this nice [http://www.fpgaarcade.com/librarytest of HSYNC width is now successfull.htm Yamaha sound chip from fpgaarcade])

==== Stereo sound output ====[[File:STarKos1 21 FPGAmstrad_800x600plustest.png|none|STarKos 1dsk has some "missing tests" but in fact there are the prefixes : CB, DD, ED, FD, used to launch other areas of instructions.21 running on FPGAmstrad]]

Sound chip was modified in order to get channel A+B at left, and channel B+C at right.It was tested HALT is the only one instruction that will be always OK using [http://www.grimwareon plustest.org/dokudsk instruction timing testbench.php/documentations/software/starkos/start STarKos 1As this instruction cannot be timed.21] sound tracker (track "Carpet")

In plustest.dsk testbench 5 does pass, except for two instruction : CPIR and CPDR - btw, in r005.8.14.1 STarKos does feel better 16, its instructions are using parameter then same "MEM_wr:slowWAIT_n generator" in OSD menu.slower than CPI/CPD : none (no WAIT_n added for theses instructions)

run"stk / esc / enter / enter / => / enter / space === GA: WAIT_n generator - plustest.asm ====About 22 pages of source code using 3 columns per page. .stdinst (wait) / esc / ctrl+F2 / \/ launch tests on several list of instruction, some instructions are tested differently using test functions : normtest, testit (bottom arrowtestdjnz) / space(ctrl+F1 to go back into the disk menu, rsttest...)

STarKos seems running PERFECTLY using A-Z80 instead of T80 ld a, please do contact me if you want a personalized fork version of CoreAmstrad using A-Z80 (I have just to switch a parameter : USE_AZ80:boolean:#c7 call rsttest =false; in FPGAmstrad_amstrad_motherboard.vhd)> C7 RST 0H 4 3

ld a,#cf call rsttest === DONE: Another disk selector ===> CF RST 8H 4 3rsttest seems a nice candidate to explore, as all its tests are failing here.

In first version of FPGAmstrad (NEXYS2) I used switches for disk selection . As final FPGA platform doesn't have any switches set, I have to add an BASIC times1 (CPC Timing array (first instruction for it, something like "OUT &CAFE,disk_number" could be fine.set))

[http://www.cpcwiki.eu/forum/emulators/amstrad-cpc-%27acid%27-test/ forum : amstrad cpc "acid" test] ==== DONE > ''I have uploaded updated tests : A advanced dsk drive ==== [http://cpctech.cpc-live.com/test.zip http://cpctech.cpc-live.com/test.zip]''

Done on r004, I added also a second Drive in order to copy easily files from one disk to anotherTests done here : ppi/psg/cpctest.

Irregular sector size ok[[File:arnoldemu_testbench_CPCTEST-r005-6.png]]

You just have In r005.6, I reach successfully some arnoldemu tests to select Drive A or B from OSD before selecting another dsk filecalibrate more efficiently HSYNC interrupt : ppi.bin, psg.bin, cpctest.bin.

Write is done directly on sdcard dsk fileGames unlocked by r005.6 : Sigma7, so you can save gamesPac-land, and write texts..Golden Tail.

You can now change disk without resetIn r005. And then play games using several disks8, Prehistorik is running fine.

[http://wwwIn r005.cpcwiki8.eu4, arnoldemu testbench "cpctest" does fail :/forum/amstrad-cpc-hardware/fdc-floppy-t80ds-detection/ CPCWiki forum - Amstrad CPC hardware - FDC floppy t80ds detection] : talk about FDC in MiST-board CoreAmstrad.

==== DONE : A advanced FDC (with write access and more) ====Since r004 In r005.8.7, arnoldemu testbench "mecasharkcpctest", the FDC implementation has write access !is OK

==== UNDONE : FAT32 fragmented files support ====Since advanced FDC, dsk files have to be defragmentedIn r005. Only ROMs are safe with a not defragemented sdcard8.14 version, using default mode "MEM_wr:quick", is OK.And Prehistorik II is running fine.

==== TODO : SNAP DSK ====Add an option in OSD MENU : In r005.8.16c29, arnoldemu testbench "SNAP DSKcpctest". Does create is OK (but it is a copy of current disk in current drive into "SNAP[number].DSK". Heuristic for number wip version : file count (at boot, incremented at each snap dsk donep)

==== GA: TODO : fix message "This program will not run in this environment. Press any key" MODE row buffer ====HartOz The core MODE does change at each begin of lines, not support the bundled CP/M+ softwareat begin of pixel drawn. With a valid working CP/M+ Disc1 image mounted, the systems returns with the following message after issuing the |cpm commandIl ne faudrait pas penser que l'on puisse changer de mode plusieurs fois par ligne. "This program will not run in this environmentEn effet. Press any keyc'est "Due to using wrong language version of CP/M+ disc impossible"! (cpmpluf1jusqu'à preuve du contraire, le mode s'enclenche à chaque synchro horizontale (HBL).dsk is french version of CP/M+)[[Filehttps:Cpmpluf1//cpcrulez.dsk.png|thumbnail|CPfr/M+ fr disk inserted (cpmpluf1coding_logon35-le_gate_array.dsk)]]htm

"Wrong disk ==== GA: Moustache testbench ====A homemade Testbench done firstly for your configuration" message seen in one-disk version helping Sorgelig to calibrate it's port of "Batman Forever" demo FPGAmstrad into MiSTer. But as Sorgelig core does run finer than mine (two separate disk version runs fine)Pinball Dreams did pass ! WAIT_n:slow, in forum they say that dsk image is using "bad track numbers"CRTC 1, in fact when looking at a Track-Info with side 1 (instead of 0Brand name: Amstrad), track and side are correct in Track-Info but side is not ok in Sector-InfoI do then take back the good behavior using this testbench, normaly track/side are ignored in Sector-Info (Track-Info is used for that)resulting r005.8.16. but still having the message, something else seems also wrong.1

Do fix also message "Bad Command" while running It's a not existing file on diskstress testbench around VSYNC/HSYNC/interrupt.

Certainly linked to If the cat doesn't catch the line, this testbench does fail (that'Orion Primess a small palette testbench).dsk'' loading problemFirst array is about VSYNC length comparable between a real CPC and an emulator. Second array is about interrupt length. Stress is done by inserting NOP, NOPNOP, NOPNOPNOP or else NOPNOPNOPNOP instruction before each measure.

=== TODO [https: A X/Y input ===/github.com/renaudhelias/RubikCubePaletteCPC/blob/master/JDVPA%236_test/jdvpa6_moustache.dsk jdvpa6_moustache.dsk]

I want to work also on screen-pen entry, is there a manner to detect an analog X/Y as pen or gun ? YES : [http[File://java.cpcJdvpa6 moustache-liveFPGAmstrad testbench.com/gx4000png|thumbnail|jdvpa6_moustache.php Markus Hohmanndsk testbench]] does it, he implements the lightgun on JavaCPC-GX4000 using mouse :)

http==== GA://cpcrulez.fr/hardwareSorgelig formula ====GA instruction-pistolettiming formula (compteur1MHz is 4MHz mod 4): -magnum_light_phaser_ACPC-Sorgelig formula : .wait_n((phase == 0) | (IORQ_n & MREQ_n) | no_wait) if compteur1MHz > 0 and (IO_REQ_R='1' or IO_REQ_W='1' or MEM_RD='1' or MEM_WR='1') then WAIT_n<='0'I put it inside OSD menu WAIT_n:quick in r005.8.16.8.5c1Does pass easily plustest.dsk test 5, but not 9. Mister Amstrad does pass test 9, I misunderstood how its Z80 is hacked.htm

=== DONE: A SCART output Z80 ===Architecture of Z80.

r005c17 ==== Z80: experimental version, original signal TV output is running fine, with OSD menu. Have to add test of a flag in mist.ini instead of using OSD menureal Zilog 80 ====[[File:Z80fx2bb.jpg]]scan-doubler doesn't run ok in mode 2Code name : Z80fx2bb, and has strange offset with Arkanoid real Z80@2MHz (vertical display gamesinstead of 4MHz), so it unvalidated : only original TV output will be added to r004 in r005on fx2bb extension card.

r005 [[http: VGA 60H/TV 50Hz/www.youtube.com/watch?v=YYnvkR5v3D0 http://www.youtube.com/watch?v=YYnvkR5v3D0]]

==== TODO : an OSD option For it I plug all wires simply from 1 to enable scan40. Some wires are cut, some are Vcc, others GND. Z80 output are directly connected, Z80 input are pull-doubler ====up with red-red-red resistors (I like red), Z80 is powered 5v (pmod can give 5v using jumper). In fact z80 is so old component that powering it 5v does output 3.3v.

scan-doubler (simple TV In fact the only difference between [[T80]] of opencore and real Z80 is that [[T80]] runs on rising_edge, and Z80 runs during low state. Test past with little modification of sequencer forcing it to VGA converter) doesn't run ok in mode 2do nothing during low state of z80, but there resulting a downclock (memory is some many recent demo effect that doesn't pass too overclocked with this sequencer modification), perhaps using current VGA 72Hz implementationbuffer on address bus and data bus could solve this detail. Have to try to insert both VGA implementations.. but as it runs for me it is not a problem.

core_r005c18 seems having ==== Z80: architecture ========= a scan-doubler output, have ) T80.vhdl =====17 pages of source codes to merge itread.

Original output signal has no border, I have to implement Contains the original border in TV modemain workflow of Z80: current MCycle and its current TState.

Done in r005===== b) T80_ALU.8vhdl =====6 pages of source codes to read.14.2

==== DONE : move SCART parameter into mistNot analyzed yet completly.ini ====Doing like in other cores This analyse can certainly be wrong : do use the global "scandoubler" option in mist.ini to switch between VGA and TV modewip.

==== DONE Contains flags : mix SCART C N P X H and V sync into HV sync (sort of Y Z S C sync) ====: carry - set if result did not fit in the register[http N ://github.com/mistnegative? -devel/mistlast instruction was substract P : parity or overflow -binaries/issues/35 Amstrad CPC core · Issue #35 · mist-devel-mist-binaries · GitHub] overflow example :signed, 7F+7F=FE with overflow setted X : undocumented SCART TVs expect a composite sync. The VGAs vsync is connected the SCART pin used to detect a RGB signal and is constantly driven high. A TV will not cope with a video signal with separate H and V sync.: half carry - set if 4bit first bits of result did not fit in the register Bu tit's usually sufficient to xor hsync and vsync to get a csync acceptable for many TVs.So something like thisY : undocumented Vsync=1;Z : zero - set if result is zero Hsync=old_Vsync xor old_Hsync;S : sign - it is an input ?Done in r005.8.14.1Contains ALU_Op : [ADD ADC SUB SBC AND XOR OR CP] ROT BIT [SET RES] DAA

==== DONE : refactor ALU_Op is the basic instructions of Parrot PAL signal ====I found a running 15kHz TV, with [http://githubZ80 coded here.com/mist-devel/mist-board/blob/master/tutorials/soc/lesson11/lesson11T80_ALU.png mist-board tutorial lesson11 Parrot PAL] running finevhdl is a slave, but not with CoreAmstrad r005a service exposed to T80_MCode.8.14.1. It's the same TV I used some years ago at festival with original CPC. I have to refactor Parrot tutorial and adapt it on CoreAmstrad in order to generate a better TV signal qualityvhdl throw T80.vhdl

Done in r005[[http://www.8z80.14info/decoding.2htm § Disassembly tables]] shall make a cool ALU_Op quick reference card, doesn't it ?

In theory, simple_GateArrayInterrupt.vhd shall have : vsync_azrael<=etat_monitor_vhsync(2); hsync_azrael<=etat_monitor_hsync(2); if hSyncCount=2+4 thenIn practice - in r005.8.14.2 - here we have : vsync_azrael<=etat_monitor_vhsync(1); hsync_azrael<=etat_monitor_hsync(1c); if hSyncCountT80_MCode.vhdl =====1+4 thenThis way screen is nicely centered but CPCWiki rule "The HSYNC is modified before being sent First 5 pages, and last 2 pages of source codes to the monitorread. It happens 2us after Others pages are "always the HSYNC from the CRTC and lasts 4us when HSYNC length is greater or equal to 6. If R2=46, and HSYNC width is 14 then monitor hsync starts at 48 and lasts until 51.same" is not respectedarchitectually speaking.

Test about centering screen are done using "BORDER 0", this way border is ignored and does interact with HSYNC/VSYNC screen synchronisationNot analyzed yet completly. This analyse can certainly be wrong : wip.

=== DONE Gives instructions lengh : CRTC1 ===r004.8 : a better CRTC/Gateway implementationMCycles, following better JEmu TStates (JavaCPC) oneplease remark the 's' at end of theses words... but it is a CRTC1 (but a better ONE)Some bugs came from PPI also (keyboard bugs in particular), solved in r004[[http://www.zilog.com/docs/z80/um0080.pdf Z80 doc]] each instruction is timing described using "M Cycles" and "T States" vocabulary.8

==== DONE It's a "controler" (proof : CRTC0 ====CRTC0 seems the best oneyou have some Set_*_To outputs), some demo does cry when detecting a poor CRTC1 (CRTC1 seem a low cost version of CRTC0). I have gives orders to implement a CRTC0 instead of my current CRTC1.T80_ALU.vhdl throw T80.vhdl

In fact CRTC1 is Actions of this controler are :* ALU_Op : the best oneaction !* I_DJNZ I_CPL I_CCF I_SCF I_RETN I_BT I_BC I_BTR I_RLD I_RRD I_INRC : actions not for ALU (wiring input/ouput, changing flags. CRTC2 is the low cost version. CRTC0 did appears before CRTC1.)* Save_ALU/PreserveC : an option about register "erased or not" at next instructionInstructions not coded in T80_MCode.vhdl but in T80.vhdl (strange, barbarian part of code ?) :* Jump/E/XY Call RstP LDZ LDW LDSPHL Special_LD ExchangeDH/Dp/AF/RS

Done in r005Inc_WZ register : take a look at [[http://www.8righto.14. Detected as CRTC0 by WakeUp! com/2014/10/how- "Enjoy the show" message displayedz80s-registers-are-implemented-down.html § The WZ temporary registers]. It's a tmp internal register in fact.

In r005==== Z80: Some bad instruction timing analysis ====Based on [[http://www.8winape.15net/ WinAPE>download>Plus test>plustest. WakeUp! (CRTC0dsk]] testbench, mapped using [[http:/MEM_wr quick) detected as Emu first time/clrhome.org/table/ Z80 instruction set - ClrHome]], and after a quick resetinstruction described then in [[http://www.zilog.com/docs/z80/um0080.pdf Z80 doc]], does say detected as CRTC0against [[http://www.winape.net/ WinAPE]] passing testbench timing.

==== DONE : CRTC1 detection ====I don't remember exactly, but Solved in r005.8.4, one of "Midline Process"/"From Scratch"/"Pheelone" demo does crash due to a "CRTC1 needed" message : my CRTC1 seems not detected as a true CRTC1... If's "From Scratch" that does display this message in fact16.3 (WAIT_n generator)

Done in r005==== Z80: Some bad instruction analysis ====Based on [[https://cpcrulez.8fr/applications_CPM-util-zexall.14 htm Zexall: Still Rising (Vanity) demo can be launchedZ80 instruction set exerciser]], better using "MEM_WR:slow" moderunning fine in JavaCPC.

[http://quasarSolved in r005.cpcscene8.net/doku16.php?id=coding:test_crtc Test CRTC 3 by Sorgelig (T80 fixes) - Quasar Net]valided

=== TODO = Z80: Interlaced scanlines ED B9 cpd(r) / ED B1 cpi(r) ====<s>Problem here : CPDR and CPIR has same implementation than ED A9 CPD and ED A1 CPI.</s>

Interlaced scanline is an effect existing in CRTC Solved by Sorgelig (register R8) used by Wolfenstrad demoSeen also at begin of '''R-Typeeedoes not pass plustest.dsk''' ("stereo soundtrack" message's picture), and seem also used testbench 5 in a lot of recent demos as "flipping lace" effectr005.8.16.2 but does pass it on Sorgelig MiSTer fork version)

Scanline In fact it is also used just a more difficult instruction that I was thinking, if you watch at begin of '''Pinball_Dreams__PREVIEW.DSK''' (eagle draw) - it, it shall take only 4 NOPs maximum but in plustest.dsk it does take 6/4 NOPs. In fact I've got a doubt C9 RET seem also used here, it seems more about a problem of HSYNC edge choice of alignement hereas sub instruction.I remark that CPD and CPI does take 4 NOPs, so here CPDR/CPIR does not has same implementation than CPD/CPI (so I was wrong : CPIR/CPIR is implemented in T80)

[http://cpcDone in r005.sylvestre8.org/technique/technique_identifier_crtc16.html Les Sucres en Morceaux - Amstrad CPC - Identifier les CRTC] OUT &BC00,8 OUT &BD00,4 : just added a TState (TStates <= "110";) on case 3, that way plustest.dsk tb 5 does succeed.

[http://quasar.cpcscene.net/doku.php?id=coding=== Z80:test_crtc Test CRTC TODO : cpc- Quasar Net] L'écran passe en 100Hz, les registres 4 et 7 doivent être doublés pour retomber sur 50Hzpower testbench ====

=== DONE [http: Scanlines //www.cpc-power.com/index.php?page=detail&num==Here effect is about simulating CRT 12883 CPC-Power Z80 FULL TEST (not CRTC.R8UK) original screen. There is several way to implement it.Here, truly one line out of two is 1/2 darker. By visual effect this result in "a thin full black horizontal line".(2012) - UTILITAIRE]

[[File:FGPAmstrad cc withoutScanlinesSome errors detected in r005.png|thumbnail]][[File:FGPAmstrad cc withScanlines8.png|thumbnail]]4 (test done by Philippe D.)

=== DONE : Monochrome option ===Add an option to turn screen into green monochrome mode (Some errors detected in mode TV and in mode VGA)r005.8.16.3

done 2 errors left only in r005.8.916.2 6 (Soleil Vert demothanks to Sorgelig hard work in T80)[[File:Soleil vert CoreAmstrad.png|thumbnail]]

==== Z80: winape testbench ====[http://cpcwww.sylvestrewinape.orgnet/techniquedownload/technique_coul1plustest.zip WinAPE plustest.html Les Sucres en Morceaux - Couleurs - 1 - Les couleurs du CPCzip (including Instruction and Interrupt timing tests)]

==== DONE : Monochrome OSD =DSK ===It's data, insertion of disk.

Done in r005In first version of FPGAmstrad (NEXYS2) I used switches for disk selection.8As final FPGA platform doesn't have any switches set, I have to add an BASIC instruction for it, something like "OUT &CAFE,disk_number" could be fine.14.4

Since FPGAmstrad in NEXYS4, disk selection is done from keyboard, using "OUT &CAFE,disk_number" instruction.A reset key was added also."PRINT INP(&CAFE)" does print current disk selected number.  === TODO = DSK: Ethernet FAT32 fragmented files support ====Integration of "ethernecSince advanced FDC, dsk files have to be defragmented.v"Only ROMs are safe with a not defragemented sdcard... ZX-Uno is using simple FDC, not impacted here. ==== DSK: TODO : arnoldemu testbench ===='''arnoldemu testbench: fdctest'''

==== arnoldemu's testbench results ====: 

==== TODO Perhaps dsk does go into sleep after a certain time of no use, and then takes a certain time to wake up when reused : arnoldemu's second testbench ====a timeout for turning the motor off. Perhaps overrun of FDC does turn the motor off.

[http://www.cpctech.orgcpc-live.ukcom/test.zip http:docs/upd765a/wwwnecfdc.cpctech.org.uk/test.zip] arnold test last update. Folder disc/htm During disk data transfers between the FDC and the processor, tests : "seekvia the data bus, recalibratethe FDC must be serviced by the processor every 27µs in the FM mode, sense interrupt statusand every 13µs in the MFM mode, sense drive statusor the FDC sets the OR (Over Run) flag in Status Register 1 to a 1 (high), write protect"and terminates the Read Data Command.

=== TODO : github migration ===arnoldemu's second testbenchHave to migrate source-code repository from renaudhelias github to mist-devel github[http://www. And also update each url in head of source-code filescpctech.org.uk/test.zip http://www.cpctech.org.uk/test.zip] arnold test last update. Folder disc/, tests : "seek, recalibrate, sense interrupt status, sense drive status, write protect"

Problematic here : Keyboard detection versus VSYNC signal versus interrupt cycle.

==== DONE PPI: A better PIO ====

Update : arnoldemu's testbench PPI passed. ==== TODO PPI: Yamaha clock ====

==== DONE PPI: PPI clock ====

=== TODO = PPI: a better border heuristic arnoldemu testbench ====Using winape arnoldemu's testbench (plustest), test 2 does show somes problems while border does go out of screen, negative border does hide line itselfPPI passed.

=== TODO : AMX mouse support SOUND ===Asked by KLNHOMEALONEPWM.

=== UNDONE = SOUND: pause Z80 while OSD is displayed PWM ====Cause playing Double Dragon II without "pause", is quite difficult.

Can have border effect in sound If you simulate a constant [[PWM]] output signal at middle range of voltage (perhaps sound can be "freeze" state just between 0V and then still up5V : 2.5V), it results an alternance of 0V and 5V, that result in a noise sound. In Arkanoid, this defect make some continues sounds instead of silents...)

=== TODO : tapes ===Do read My idea is generating a sound having a frequency upper than dog ultra sound, while I want to simulate a constant 2.CDT files also5V.

For this I think @ralferoo had already written FPGA code for tape reading for his FPGA CPC. Maybe you can borrow some code from him? Brycedo use two clocks entries in my [[PWM]] : one about data entry, and another about algorithm execution.

=== DONE BUT SEEMS USELESS This result a high quality sound output (in addition to this nice [http: welcome VGA signal ===//www.fpgaarcade.com/library.htm Yamaha sound chip from fpgaarcade])

While bootloader is not fully started, do display a lighter screen ==== SOUND: Stereo sound output (not darker pixels as original screen color CPC depth using more resistors), as it VGA should be nicely centered at each boot====[[File:STarKos1 21 FPGAmstrad_800x600. And then after come back to original CPC pixel depthpng|none|STarKos 1.21 running on FPGAmstrad]]

Some VGA does detect FPGAmstrad resolution just if pixels are ligtherSound chip was modified in order to get channel A+B at left, so I turn them lighter during and channel B+C at right.It was tested OK using [http://www.grimware.org/doku.php/documentations/software/starkos/start of engineSTarKos 1. Normaly a press into reset button (the one front the sdcard entry) does solve directly this problem 21] sound tracker (you can also turn on screen before MiST-board with this sort of screenstrack "Carpet")

I tryed also [http://githubIn r005.com/mist-devel/mist-binaries/tree/master/cores/menu menu core project] with my stupid screen, as it normally I can power on MiST-board before screen for FPGAmstrad (switching core 8.14.1 STarKos does the stuff here also)feel better using parameter "MEM_wr:slow" in OSD menu.

This solution does not fix the problem STarKos seems running PERFECTLY using A-Z80 instead of "stupid screen"T80, but reveals something interesting about the defect (next chapter) ==== SAMSUNG 16/9 tests ====Using lighter pixels full white screen during bootload show please do contact me that screen doubts between two positions : a perfect centered 4/3 with 6.5 centimeters horizontal border each; and a starting 16/9 at left, crop at 6.5 centimeters left. Without lighter pixels full white screen, the crop of image does change, moving into first displayed characters : in fact in SAMSUNG menu, the position of screen is not 50 50, if you put 50 50 you come back to "lighter pixels full white screen" defect. So here screen begining at first char displayed on screen is want a second defect, but a small one, as you personalized fork version of CoreAmstrad using A-Z80 (I have just have to set 50 50 in SAMSUNG menu. So back to previous bug : screen doubt between two positions "switch a perfect centered 4/3 with 6.5 centimeters horizontal border each; and a starting 16/9 at left, crop at 6.5 centimeters left".When displaying a game, in fact, in found two different case in "perfect centered 4/3" case , this case is not so perfect, it does also doubts between two positions parameter : * one time screen does crop at 6.5 left and right, changing the screen vertical position using menu does translate the image cropping left and right at fix position USE_AZ80: 6.5 centimeters fix black border. About extra 1 centimeter pixels boolean: image =false; in middle of image does move, but not the borders at allFPGAmstrad_amstrad_motherboard.* a second time image does move perfectly (completely/totallyvhd) left and right without crop, and if centered has 6.5 black border left and right. This time image seems complete but crushed. === TODO = SOUND: snapshoot purpose Dual SID ====Like in emulators, do something to go back in time while running a game.Why not ?

=== USB joystick Joystick ===

USB is just a state machine (welcome how are you today, show me your state, show me your state, show me your state....), encoding (have to read USB manual), you can use some usb sniffer softwares software to decode them (wireshark unix version does it fine). Sniffer software does not show low level messages (ack ko ok) but does show the high level messages (ones that show that a button is pressed or not)

On [[http://www.digilentinc.com/Products/Detail.cfm?Prod=NEXYS2 Diligent NEXYS2 official page]], you can download a "Onboard Memory controller reference design" that contains explanation and VHDL source code about dumping on RAM/ROM of NEXYS2 directly from PC (usb port). I didn't tested this yet, but it is certainly a nicer approach :P

* amstrad_video : does manage a true VGA output, using a an internal VRAM.

=== FPGAmstrad source code (Xilinx)===