Changes

The '''CRTC''' (Cathode Ray Tube Controller) helps to generate the video signal of the Amstrad CPC.

CRTC generates the address, Gate-Array reads the data and converts it to pixels based on the current mode.

== DISPTMG ==

The border has higher priority than pixels but lower priority than the black colour output when HSYNC/VSYNC are active.

The VSYNC is also modified before being sent to the monitor. It happens two lines* after the VSYNC from the CRTC and stay two lines (same cut rule if VSYNC is lower than 4). PAL (50Hz) does need two lines VSYNC_width, and 4us HSYNC_width.

== The 6845 Registers ==

|2||Horizontal Sync Position ||00000000||46||When to start the HSync signal.

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|4||Vertical Total (-1)||x0000000||38||Height of the screen, in characters.

|7||Vertical Sync Position||x0000000||30||When to start the VSync signal, in characters.

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|11||Cursor End Raster||xxx00000||0||Sets last raster row of character that cursor is on to invert

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|13||Display Start Address (Low)||00000000||0||Allows you to offset the start of screen memory for hardware scrolling, and if using memory from address &0000 with the firmware.

|15||Cursor Address (Low)||00000000||0

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registers 18-31 read as 0, on type 0 and 2.

Details about Reg. 12 and Reg. 13 specifically:

|1||0||-||-

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|1||0||Read Status Register||Read Only

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|1||0||-||-

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|1||0||Read from selected internal 6845 register||Read Only

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{|{{Prettytable|width: 700px; font-size: 2em;}}

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|0||1 & 2||3 & 4

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|12||Display Start Address (High)||Read/Write||Write Only||Read/Write

|13||Display Start Address (Low)||Read/Write||Write Only||Read/Write

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'''Notes'''

* See the document "Extra CPC Plus Hardware Information" for more details.

R31 is described in the UM6845R documentation as "Dummy Register".

In the UM6845R it appears to have no effect. Reading and writing does nothing. Reading it returns 0x0ff.

The UM6845R differs to other CRTC in respect of R12/R13.

In demos to make a display compatible with all CRTCs program R12/R13 when VCC!=0. This will then take effect at the next frame start.

The UM6845R has a status register that can be read using port &BExx.

All the other bits read as 0 and don't have any function.

[[File:CRTC timing small.gif]]

== Internal Counters ==

|VTAC

|C5 (or C9 on CRTCs 0/3/4)

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== Hitachi Block Diagram ==

[[File:CRTC Block Diagram.png]]

== UMC Block Diagram ==

[[File:UMC CRTC Block Diagram.png]]

== Motorola Block Diagram ==

[[File:Motorola CRTC Block Diagram.png]]

== Datasheets ==

* [[Media:Um6845r.umc.pdf|UM6845R (UMC) (aka type 1)]]

* [[Media:Mc6845.motorola.pdf|MC6845 (Motorola) (aka type 2)]] [[Media:Mc6845.pdf|Other datasheet version]]

== Unused clones ==

* [UM6845E by UMC]

* [SY6845EA by Synertek]

* [https://github.com/hoglet67/BeebFpga/blob/dev/src/common/mc6845.vhd BeebFpga] [https://github.com/MiSTer-devel/Amstrad_MiSTer/blob/master/rtl/UM6845R.v MiSTer] [https://opencores.org/websvn/filedetails?repname=System09&path=%2FSystem09%2Ftrunk%2Frtl%2FVHDL%2Fcrtc6845.vhd OpenCores] Verilog/VHDL implementations of the 6845

* [http://www.cpcwiki.eu/imgs/9/99/Elmar_Krieger-SPECIAL_EFFECTS.dsk some BASIC tools to detect CRTC types 0-1-2 and show some effects] by [[Elmar Krieger]] (DSK for Emulators)

* [[File:Shaker addon.dsk]] Shaker Add-On (Pixel 1 Hard Scroll / Vertical Rupture all Crtc)

* [http://www.grimware.org/doku.php/documentations/devices/crtc CRTC documentation from Grimware]

* [http://quasar.cpcscene.net/doku.php?id=assem:crtc Quasar CRTC documentation (in french)]

* [[Media:Dossier CRTC(Ramlaid Mortel).pdf]] Les entrailles du CRTC

* [https://thecheshirec.at/tag/crtc6845/ Leçons CRTC (CheshireCat)]

==Related pages==