Difference between revisions of "Action Replay AMX"

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(Technical)
(Technical)
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== Technical ==
 
== Technical ==
  
* Has a write only I/O port &FBFB/&FAFB (partially decoded. A10=0, A2=0). A8 controls ROMDIS/RAMDIS signal. Cleared by RESET.
+
* the static RAM is accessible between 0-1fff. It could be mirrored between 2000-3fff.
* Freeze button seems to trigger normal interrupt (not NMI?)
+
* Has a write only I/O port where A10=0 and A2=0. A8 of the port address (when '1'?) is used to 'activate' the ROMDIS signal (see IC1A) causing the CPC's ROM to be disabled. The static ram is then readable in the address space from 0-fff. A9 of the port address (when '1'?) (see IC1B) is used to 'activate' the RAMDIS signal causing the CPC's RAM to be disabled. This allows the static RAM to be read/written in the range 1000-1fff since access depends on A12 (see IC7A). It's not clear if both are visible.
* Seems like there is rom and ram access.
+
It's not clear how the entire space can be written to.
 +
 
* The unit has a switch for load/save, looks like A12 is driven depending on that.
 
* The unit has a switch for load/save, looks like A12 is driven depending on that.
 +
 +
All the above has been derived from schematics so may be wrong. This needs testing.
  
 
== Pictures ==
 
== Pictures ==

Revision as of 11:41, 1 May 2021

Action Replay A.M.X.

Made by Datel Electronics.

Now, thanks to Jose Leandro, the hardware specialist of the spectrum, with his famous page :

http://trastero.speccy.org/cosas/JL/JL.htm

We can know more about this hardware.

The hardware only has RAM and not ROM, therefore the device needs software programmed into the RAM to use it.

Technical

  • the static RAM is accessible between 0-1fff. It could be mirrored between 2000-3fff.
  • Has a write only I/O port where A10=0 and A2=0. A8 of the port address (when '1'?) is used to 'activate' the ROMDIS signal (see IC1A) causing the CPC's ROM to be disabled. The static ram is then readable in the address space from 0-fff. A9 of the port address (when '1'?) (see IC1B) is used to 'activate' the RAMDIS signal causing the CPC's RAM to be disabled. This allows the static RAM to be read/written in the range 1000-1fff since access depends on A12 (see IC7A). It's not clear if both are visible.

It's not clear how the entire space can be written to.

  • The unit has a switch for load/save, looks like A12 is driven depending on that.

All the above has been derived from schematics so may be wrong. This needs testing.

Pictures


Downloads

Weblinks