== PPI 8255 ==
{|{{Prettytable|width: 700px; font-size: 2em;}}|''I/O address''||''A9''||''A8''||''Description''||''Read/Write status''||''Used Direction''||''Used for''|-|&F4xx||0||0||Port A Data||Read/Write||In/Out||Works similar to the [[PSG8255]] in the CPC (Sound/Keyboard/Joystick/Printer, Baudrate/Future Timer, and RTCsee there for details)|-|&F5xx||0||1||Port B Data||Read/Write||In||Vsync/Jumpers/PrinterBusy/CasIn/Exp|-|&F6xx||1||0||Port C Data||Read/Write||Out||KeybRow/CasOut/PSG|-|&F7xx||1||1||Control||Write Only||Out||Control|-|}. Differences are listed below.
=== PPI Port A (Port F4xxh) ===
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|''Bit''||''Description''||''Usagein CPC''||''Usage in Aleste''
|-
|7-0||PSG.DATA||[[PSG]] Databus (Sound/Keyboard/Joystick)||[[PSG]] Databus (Sound/Keyboard/Joystick/Printer, Baudrate/Future Timer, and RTC)
|-
|}
=== PPI Port B (Port F5xxh) ===
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|}
=== PPI Port C (Port F6xxh) ===
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=== PPI Control (Port F7xxh) ===
This register has two different functions depending on bit7 of the data written to this register.
See the normal CPCs [[8255]] description for details.