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asic im 2 vector

Started by arnoldemu, 10:30, 21 January 15

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arnoldemu

I have been testing the Asic's "vectored" interrupts on my gx4000. I have been trying to find the causes of the bug.

I am not seeing consisent results and I haven't found the cause yet.

When the bug happens the lower 3 bits of the vector are forced to 4.
I have seen this happen for:

1. PRI raster interrupts (no dma)
2. any DMA channel on it's own without PRI (PRI interrupts set to a line that can't be reached e.g. 254 then changing R4 to make a shorter frame).
3. All DMA channels together and no PRI

In all cases the control value (6c0f) correctly indicates the source of the interrupt and the appropiate channel enable values, it doesn't give false results. It doesn't indicate that the dma channel associated with 4 is interrupting.

What I did see is that if I moved my code in ram (from a000 to 9000) for example but the rest was the same (im 2 vector location etc), I saw more errors. At a000, the code seemed to run without a single error, but at 9000, I saw the errors frequently. The DMA channel location didn't change, the im2 table didn't change.

I don't think that is the cause.

When the bug does happen, so far it doesn't happen all the time, it follows a pattern, but the start of the pattern is not always the same (e.g. the pattern is not tied to a specific IVR value).

I am now thinking it may be down to the actual instruction being executed. ASIC may be asserting the vector too early or too late and perhaps not holding it for long enough, this is causing the problem. Or perhaps something on the bus is clashing with the vector and causing it to change.

I will continue testing over the next few weeks.

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