Just thought I'd let you guys know that I've submitted my design to a PCB house so hopefully in a few weeks I'll know if my redesign actually works... But because I'm so excited about it, I thought I'd post a couple of pictures of the PCB:
(http://www.ranulf.net/fpga/homeboard99.top.small.png)
(http://www.ranulf.net/fpga/homeboard99.bottom.small.png)
Of note on this prototype is the massive bank of IO ports on the right hand side of the board - 4 banks of GPIO, each with 8 inputs and outputs, a dedicated keyboard matrix connector. I've ditched the tape input socket in favour of a pin header so I can experiment with the op-amp solution that Joss is using. Instead, I've got a DVI output and lineout socket to accompany the SCART socket.
Fingers crossed this all works! :)
Nice work !!
However, I would have used slighly wider power tracks, they do not look wider than signals one.
By the way, which PCB house do you use ?
/me wants...
Quote from: gerald on 17:21, 11 March 13
However, I would have used slighly wider power tracks, they do not look wider than signals one.
By the way, which PCB house do you use ?
I meant to make them a bit wider actually, but they should be fine as they are. The signal lines are all 0.2mm and power are all 0.4mm, which is good for 1.2A with 10 degree rise. The maximum current the regulators can handle is 1A (trace width of 0.3mm) and the revision 1 prototype only used about 120mA at peak, so I doubt I'll be much higher on this board, although I guess that depends on what gets plugged into the GPIO lines.
But yeah, I guess I'll find out how well it works in practice!
QuoteBy the way, which PCB house do you use ?
Last time I used Laen's PCB prototyping service (dorkbotpdx), this time I'm using a UK company (quick-teck.co.uk) as they can actually give me a shipping date. The UK one works out more expensive for smaller quantities, but seemed like a more helpful service as they'd actually give me a firm delivery date in 3 weeks time - last time postage from US including customs took about 4.5 weeks. I ended up buying more boards than I think I'll need, at that price it works out cheaper than the US one.
Quote from: ralferoo on 22:42, 11 March 13
I meant to make them a bit wider actually, but they should be fine as they are. The signal lines are all 0.2mm and power are all 0.4mm, which is good for 1.2A with 10 degree rise. The maximum current the regulators can handle is 1A (trace width of 0.3mm) and the revision 1 prototype only used about 120mA at peak, so I doubt I'll be much higher on this board, although I guess that depends on what gets plugged into the GPIO lines.
I'm usually thinking track resistance and voltage drop. A 0.4mm track is about 0.065 Ohm per inch. While average current consumption this is fine, you may want to make sure that peak current is fine as well, mainly the fpga vccint.
Quote from: ralferoo on 22:42, 11 March 13
Last time I used Laen's PCB prototyping service (dorkbotpdx), this time I'm using a UK company (quick-teck.co.uk) as they can actually give me a shipping date. The UK one works out more expensive for smaller quantities, but seemed like a more helpful service as they'd actually give me a firm delivery date in 3 weeks time - last time postage from US including customs took about 4.5 weeks. I ended up buying more boards than I think I'll need, at that price it works out cheaper than the US one.
I will have look, thanks :)
Quote from: gerald on 09:40, 12 March 13
I'm usually thinking track resistance and voltage drop. A 0.4mm track is about 0.065 Ohm per inch. While average current consumption this is fine, you may want to make sure that peak current is fine as well, mainly the fpga vccint.
Yeah, it was always something I meant to go back and change, but I just forgot! Last time I used 0.6mm for all the main power rails and 0.8mm for the 5V in that fed the voltage regulators. This time for some reason, I laid them out with 0.4mm and always planned to upgrade them when I rerouted everything after initial layout but then just completely forgot. Anyway, I'll see how it goes as the current was pretty low last time.
I mostly expected this to be another prototype board really anyway - it was mostly so I could try out a DVI output solution and fix a couple of stupid design decisions that were annoying me with the last board (mostly not enough IO but also last time the Atmega chip couldn't access the SD card as that was only connected to the FPGA, this time they can share by closing some jumpers it so hopefully I'll be able to get it booting from SD card making it easy to change FPGA images without using USB).
Quote from: gerald on 09:40, 12 March 13
[RE: PCB manufacturer]
I will have look, thanks :)
BTW, if you do decide to get some PCBs made with quick-teck, let me know. They've currently got a referral deal until the end of July where both parties get a £25 discount. ;)
I'll let you know how these boards turn out...
Quote from: ralferoo on 13:10, 16 March 13
BTW, if you do decide to get some PCBs made with quick-teck, let me know. They've currently got a referral deal until the end of July where both parties get a £25 discount. ;)
I'll let you know how these boards turn out...
Have you ever tried Home | Eurocircuits (http://www.eurocircuits.com)
The last PCB batch I made (80x80 dual sided) was cheaper than quick-teck quote (85Euros vs 97Euros (excluding taxes, including shipping)).
However, support is terrible : they do not bother responding to mail and barely answer phone :o
Quote from: gerald on 14:43, 16 March 13
Have you ever tried Home | Eurocircuits (http://www.eurocircuits.com)
I just tried a quick quote on the quantity and size I used for this order and the price at Eurocircuits seemed quite a bit more expensive. That said, I didn't try tweaking any of the values to find the optimal order size for my board size.
[EDIT: realised what i'd written didn't make sense!]
Just thought I'd mention the feature that I've had planned for over a year and only just got round to adding!
Monitor emulation - so now horizontal smooth scrolling even works on an LCD TV... :)
Relentless on cpcfpga - YouTube (http://youtu.be/9mOMSfXha48)
Here's a picture that shows it a bit more clearly with a static image:
(http://ranulf.net/fpga/IMG_20140111_200938_900.jpg)
It looks a bit weird, but the red bit is just a red box with black border and I'm doing the equivalent of horizontal scrolling at various points on the screen.
Scrolling may be smooth, but handycam is certainly not :D
Anyhow, really glad this is progressing!!! What exactly do you mean by "monitor emulation"?
Quote from: Gryzor on 00:41, 12 January 14
Scrolling may be smooth, but handycam is certainly not :D
Yeah, that's true! The lighting is atrocious too... :(
Quote
Anyhow, really glad this is progressing!!! What exactly do you mean by "monitor emulation"?
I emulate how the monitor in the CPC would react to the signal and then I send that image to the TV instead of the raw signal. It's essentially imperceptable, but I delay the signal by 1 screen line so that I can react left or right adjustments of the hsync pulse.
The real benefit is that the TV always sees a perfect signal - a 6us long sync pulse every 64us, so it's no longer relying on the output monitor's behaviour to perform scrolling which only works when you have a 15625Hz PLL (i.e. every 64us).
If you want some theory, the TV doesn't directly operate on the HSYNC signal sent by the CPC at all. Instead, it operates on a free running oscillator running at approximately 15625Hz. There's a PLL (phase locked loop) that adjusts this signal slightly proportionally to the phase error of the two signals. So, each cycle it attempts to minimise the distance between the two crests of the two waves. This allows the clocks to be made cheaply as they don't need to be very precise but more importantly, it allows the TV to synchronise with the TV station or computer that's sending the signal.
LCDs generally are designed with PLLs that operate at double the frequency (think of an Amiga multisync monitor for instance) which still works for TV signals because even though it's double the clock speed, it'll minimise the distance between every other crest of its clock and every crest of the signal clock. The only difference is that the phase difference will be double, so it reacts twice as quickly as the CRT which runs a slower clock.
The new logic in the FPGA does this same operation internally and hard coded to the frequency of a CRT and then sends the TV a signal that will always sync perfectly and stay there as it never varies its frequency.
Excellent work and looking fabulous! :)
Nice explanation and solution. It makes me glad that the CPC community has people so knowledgeable.
if I am reading this right this is a CPC ? as in new version?
Quote from: dcdrac on 00:08, 13 January 14
if I am reading this right this is a CPC ? as in new version?
I guess. It's my reimplementation of a CPC on my own FPGA board. It's been an ongoing project of mine for about 2 years now and I'm already on the 3rd version... :)
There's more info here: CPC2013 (http://cpc2013.com/) and CPC FPGA - Recreation of an Amstrad CPC on an FPGA (http://cpcfpga.com)
This is really awesome! If you ever decide to sell some of these, I'd love one!
So we should be able to mount it in a real CPC case? That would be amazing! I can't help wondering about expansion and floppy disc port emulation with GPIO (though I know they're probably unnecessary given that you could emulate most hardware on board).
Does it overclock?
Amazing work :D
I would love one of these in a cpc case imagine adding a sd card reader like a HxC
Quote from: dcdrac on 18:25, 13 January 14
I would love one of these in a cpc case imagine adding a sd card reader like a HxC
Why imagine? Look the board, it already got one.
It's a great project, because in the future it will be more difficult to plug a CPC on a modern display.
Nice to know that the R3 hardscroll is now supported on LCD screens. : :-*
Emulating the video output to include R3 scrolling is very cool indeed, hats off to you.
I too would love a FPGA CPC, but only once it's been established that it's exact ;)
Great work though ralferoo, interesting to see it developing as always.
you have a customer willing to buy one if it can work like all the CPCs pluses included with the ability to run a GUI
It doesn't emulate any of the CPC plus machines yet. I might add plus functionality at a later date, but that's quite low on my priorities at the moment as I want to get all the floppy stuff working properly first and then I'll probably do another board redesign as there are some hardware improvements I want to make too.
The current board can actually manage 4096 colours by some amazing miracle (it was actually designed to just do the 27 normal colours, but dithering seems to work incredibly well on it as my circuit has enough capacitance to operate as a low pass smoothing filter!) but the main reason I'm not that concerned about plus emulation is that I just don't use my plus or my GX4000s for anything other than playing Pang anyway!
I was just thinking could this be made into a kind of module that would fit in the slot in a 6128 plus where the floppy drive is?
I use an external floppy with my plus because the internal drive is too far gone to rescue.
Quote from: dcdrac on 18:47, 14 January 14
I was just thinking could this be made into a kind of module that would fit in the slot in a 6128 plus where the floppy drive is?
I use an external floppy with my plus because the internal drive is too far gone to rescue.
??? The CPC2013 is a complete CPC, what you're looking for is a HxC.
Bryce.
hmm lets be greedy have two CPCs in one box :-)
The only use I see for it to fit in a CPC case is to connect it to a modern display while using original materials. But this would mean connecting the CPC keyboard to it as well...
What FPGA are you using?
Quote from: Gryzor on 19:52, 15 January 14
The only use I see for it to fit in a CPC case is to connect it to a modern display while using original materials. But this would mean connecting the CPC keyboard to it as well...
I always planned to fit one of these inside my broken 464 which was so badly butchered when I got it that I don't think it'll ever live again. But, it's got a nice keyboard and a tape deck that should be able to be hooked up directly to the board... ;)
Quote
What FPGA are you using?
Xilinx XC3S400. It's a bit old now, but has a lot of logic slices... The current CPC emulation uses less than 3/4 of the chip, so there's still quite a bit of growing room! :)
Don't know much about FPGA development, but I think that 3/4 of the XC3S400, judging from the datasheet, is pretty ok! How much memory?
512KB of RAM.
512KB-4MB of flash ROM (64-256 ROM slots, with 4 used for UPPER, LOWER, AMSDOS, FPGA utility ROM).
If I make any boards for people, I'll use the bigger flash ROMs, I just had a load of smaller ones so that's what I used for testing originally.
The RAM is currently 64KB + 448KB expansion pack. I might use some of that memory for debug support or floppy implementation (I don't need it currently, but thinking of redoing the floppy emulation completely), so I'd probably make it 64KB+256KB+64KB for the final configuration and allow the 256KB to be either a 256KB RAM pack or 256KB silicon disc.
Oh! I expected the 512KB of RAM, but the huge ROM memory is gooood!!!And yes, I think you'll want to make some for others ;)
By the way, will it have an OSD for settings/operation?
Quote from: Gryzor on 10:23, 16 January 14By the way, will it have an OSD for settings/operation?
You are a GrEEK ! ;D
Oh, come on, what year is it, 1984? :D
The CPC... Yes. :D
The FPGA... no!
Calling it CPC2013 was a bit premature and puts you under pressure to finish it (maybe your reason for the name?). Personally I would have waited before giving it a name with the year included :) Otherwise you end up looking like Microsoft :D
Bryce.
Heh... deadline missed! Where are the goods? :D
Of course we may argue that the "13" stands because the project started in 2013...
Quote from: Gryzor on 12:48, 16 January 14
Of course we may argue that the "13" stands because the project started in 2013...
Except it didn't, it started long before that.
Bryce.
The current revision was started in 2013 and that was supposed to be the codename for the first releasable board except that I didn't release it on time! I chose that name as it was almost an Amstrad like model number... :)
The project as a whole was started in 2012 and that's when I registered the more sensible cpcfpga.com domain!
BTW, I have got cpc2014.com registered, but there's nothing there yet!
Smoooth plug for the site :D
But it only points to CPC FPGA (http://ralferoo.blogspot.com). Booh!