I really really need an AMSDOS VGA signal-compatible card for my CPC

[zhulien]

Hi everyone, 

I really really need an AMSDOS VGA signal-compatible card for my CPC.

As an absolute minimum: 

An Mx4 card that I can patch the firmware to make text output go to it and display to an 80x25 screen and with screen positioning and clear screen - the goal is that I can at least develop software with my CPC at home with a monitor that has a VGA plug - so it could be a very very simple microcontroller.  Ideally it could drive 2 VGA monitors in this text mode - perhaps make it look like a multiplay with VGA plugs.

Yes, this should be possible on CPLINK but I am wanting more than 1 and multiple CPLINK + multiple PIs are more expensive than a VGA text output card.

So to kick off the demand for a VGA signal-compatible dual head card, I'd buy 2 to 4 of them if the price is reasonable.   

[zhulien]

I guess this could work with mini booster - but didn't someone say they wanted to make a 4 serial port M4 card?


https://www.youtube.com/watch?v=LOhmlOyUw4w

https://github.com/Xinyuan-LilyGO/VGA32

http://www.fabglib.org/

[zhulien]

I still think a better CPC dedicated VGA card could work better.

[eto]

the goal is that I can at least develop software with my CPC at home with a monitor that has a VGA plug

GBS8200 with GBS Control mod works great for that purpose. 

[poulette73]

From a French CPC user, posted 2 days ago on CPCRulez 👍

[rpalmer]

Zhulien,

I have been also working such as card, see attached pics/docs.
It is in the very very early stages of development.

rpalmer

[eto]

It is in the very very early stages of development.

What IC is it using?

[rpalmer]

The FPGA is at the moment a Cyclone IV (I have 3) so want to make sure the board works before I solder any of them to it.

[SerErris]

Hmm, The graphics is in theory already VGA compatible (as it is actually CGA and that is backwards compatible).

The only thing you need to do is to create a line doubler, as the frequency of CPC 15khz is not supported by most VGA monitors. So that is actually really it and what the GBS actually does. 

If you have a VGA Monitor that already can directly take 15khz - than you have actually everything you need to connect your CPC to it.

[zhulien]

Thats my issue to date... I have lots of CPCs but a single monitor in another location, if I can use my TV via vga plug or another vga monitor at normal current refresh rates that will be great, but for programming I only need text output as a minimum...

Winape doesn't support the hardware I am coding drivers for so no use.

[zhulien]

Zhulien,

I have been also working such as card, see attached pics/docs.
It is in the very very early stages of development.

rpalmer

Curious, if you keep it as an fpg that is not a bad thing, it means if you make the core open source, it could be enhanced... if you were to make vga output, also put an audio out too even if it isn't initially used so if some later date you want AY or SIDs or other audio you could add it.  You could even out a second z80 core as a core in there with some ram at a hugely accelerated rate, of course existing software wouldn't use it.

[zhulien]

Your design above sounds really good, does the fpga version work and can you also make thst available?

[SerErris]

So the solution from rpalmer looks to be an external interface. And that means, it does not work with standard BASIC, because you will not get any output.

So even be able to type normal input, the ROM needs to change, removing compatibility. The main problem is, that CPC ROM is not created with external displays in mind, so there is no simple patch to achive that. 

The problem with the CPC Architecture is, that any external card will not be able to access the CPC memory directly and read the screen ram are (>C000). The screen RAM is hidden behind TTL logic (a Buffer in particular) and you will not be able to address it from external port, without conflicting with the CPU control lines.
Also the RAM is already full congested via CPU and GateArray, so there is literally no time window left to read from the RAM. 

One option would be to do something very similar in the external graphics, what the M4 module from Duke does. You sniff the address and memory bus. Everytime you have a write operation to >C000, you take that and put it into the local vram of the external graphics card. That will automatically mirror the screen RAM to video RAM and makes it 100% compatible with internal ROM. That can be achieved in an FPGA, without any problem, as you just need to monitor the WR line and decode the address lines two highest bits. Then if you get that triggert, take the word on DataBus and put it into your local RAM to the correct address. (For that you need to store the Address as well). 

And then you only need to take care of the line doubling. (making 200 lines into 400 lines). That is also very simple task in an FPGA and output will be then done with 30khz, like standard VGA did and every VGA monitor will still suport as of today.

If your VGA monitor has at least DVI, just get yourself a RGB2HDMI. That is much simpler and has everything ready:
https://github.com/xcqq/HDMI2RGB
https://www.sellmyretro.com/offer/details/61524

You need a HDMI Mini to DVI/HDMI/DP cable, to connect it to your TV/Monitor.

Another very workable option, esp for programming is a ScartCable and a Scart2HDMI Adapter like this combination:
https://t.ly/tKZJj <-Link to Amazon.de

This is the more luxury version of the Scart Adapter, works also great:
https://t.ly/lGeTT <-Link to Amazon.de

[rpalmer]

So the solution from rpalmer looks to be an external interface. And that means, it does not work with standard BASIC, because you will not get any output.

So even be able to type normal input, the ROM needs to change, removing compatibility. The main problem is, that CPC ROM is not created with external displays in mind, so there is no simple patch to achive that.

The EVA Card will work in BASIC as the FPGA will capture the writes to &C000 thus any ROM access is not an issue as the writes to &C000 is to RAM and not ROM by the gate array (ROMEN goes high and not LOW if the ROM is currently actively switched in).

The card is expected to work completely with ALL games as the card can be configured to capture the writes to RAM where ever the CRTC has defined the video memory as the I/O for the CRTC is also captured by the FPGA!

[Skunkfish]

@rpalmer 

That sounds fantastic if it works as you say, could be the highest quality video output seen so far from a CPC? Although, perhaps a little too good quality 

How would it work with games/demos that push the CRTC harder?

[eto]

Yes, this should be possible on CPLINK but I am wanting more than 1 and multiple CPLINK + multiple PIs are more expensive than a VGA text output card.

You also would need more than one VGA card if you want to have more than one monitor attached, right? And a Raspberry Pi Zero 2 is a lot cheaper than a FPGA IC. 

Actually, that sounds like you can do it all immediately and show us your idea in action. Take the CPLink, attach a Raspberry, write a PoC and some drivers. Then I am pretty sure someone will pick it up and check out if it can be done more powerful or more end-user ready. As the drivers then just need to be adjusted, it would almost instantly have software support and can be adopted by the community. 

[zhulien]

Yes, this should be possible on CPLINK but I am wanting more than 1 and multiple CPLINK + multiple PIs are more expensive than a VGA text output card.

You also would need more than one VGA card if you want to have more than one monitor attached, right? And a Raspberry Pi Zero 2 is a lot cheaper than a FPGA IC.

Actually, that sounds like you can do it all immediately and show us your idea in action. Take the CPLink, attach a Raspberry, write a PoC and some drivers. Then I am pretty sure someone will pick it up and check out if it can be done more powerful or more end-user ready. As the drivers then just need to be adjusted, it would almost instantly have software support and can be adopted by the community.

Yes, but how to do that?  I don't have a monitor capable of displaying a CPC currently at home where I live - I have to program on the real CPC periodically.  Besides that, I guess i can at least start the code on the pi side.  I will bring the pi home next time I go there.

[SerErris]

You need to connect the Pi to all address lines and all data lines + the control lines (WR at least), you can also monitor ROMEN as outlined by rpalmer above.

Then what you do whenever you have ~WR low, you grab the address lines and the data lines (maybe with two shift registers?) and then mirror the writes to &C000 - &FFFF to your vram. The rest is just interpreting that data regualary and outputting it to HDMI screen via the PI Z.

The first part is just logic (Read some pins and then read in two values, one 16bit and one 8bit). As the PI Zero has very few IO Pins (to few afaik for this), you would need to use some buffer device to catch the values, as they are only reliably there for 200-400 ns or so.

Those two would work:
SN74LS674  16bit shift register  Parallel In/Serial Out
SN74HCT165  8bit shift register Parallel In/Serial Out

[SerErris]

So something along this lines (i had no 74LS674, so I used 2 8bit shift registers with daisy chaining).