Hello there my fellow CPC'ers
I have decided that I want to make this project official so I can share its development with you all as well as get some help in resources and ideas.
This will be my only project for the CPC this year, and would be awesome if it can be realized before Christmas, so any help - pointers would be awesome - besides its not fair that I keep bugging Bryce all the time ;)
I have been a C / C++ developer for over 20 years on various systems and know quite a few other high-level languages. I am currently re-teaching myself Z80 ASM through the use of PASMO and z88dk. This open project is quite simple in that to develop an IDE adapter for the Z80 bus.
As a premise I looking to adapt the 8bit and 16bit Z80 bus IDE adapters that the Spectrum uses and its about time that we CPC users had this as well.
(http://s6.postimage.org/7if47o5o1/shoot_2.jpg) (http://postimage.org/)
(here is one I made earlier ;))The above adapter can be configure like this
(http://www.worldofspectrum.org/zxplus3e/images/schematic.gif)
A0,A1 and A2 IDE Configuration
Using Z80 - A8 (pin 38) - IDE A0
Using Z80 - A12 (pin 2) - IDE A1
Using Z80 - A13 (pin 3) - IDE A2
Also it can be configured to use different Z80 addresses for A0, A1 and A2 of the IDE
Using Z80 - A3 (pin 32) - IDE A0
Using Z80 - A6 (pin 36) - IDE A1
Using Z80 - A7 (pin 37) - IDE A2
The hardware is quite simple indeed, and consists mainly of passive components
40pin Z80 ZIF Socket (for CPU)
40pin ZIF Header (For connectivity to the motherboard CPU Socket)
40-pin IDE connector (to connect up to two IDE Hard Disk Devices)
74HC10 IC Handle /M1 , IORQ (for R/W), A4 and CS0 / CS1
Initialize IDE Reset
- BC327 transistor
- 100K resistor
NMI De-bouncing
- 33pf Capacitor
- 1MOhm Resistor
The work behind it all is in fact the ROM routines, by far the most experience I have had with them is from the +3e environment hence I will be focusing on this area for adaptation. Also an interesting fact is the +3 DOS ROM is by Cliff Lawson, it is essentially a rewrite of the Amstrad PCW DOS which implements a CP/M compatible disksystem.
In ROM2 from the Spectrum +3e then we have +3DOS with IDEDOS, the IDEDOS part was written by Garry Lancaster and is designed to hook into the simple 8-bit IDE interface designed by Pera Putnik. which a hardware adaptation I have linked here.
Programmers resource Here (http://www.worldofspectrum.org/zxplus3e/technical.html)
So any help in resources, current projects and just ideas would be most welcome.
Thanks for reading.
Hello !
Thank you for your interest about the CPC. An IDE adapter will be great today. :)
I got some questions:
- Is, using 8bit on the 16bit databus will allow to work properly with all kind of units ?
- Or, is it possible to buffer 2x8bit before sending 16bit ?
- Because today it's really common to add 2.5" CF adapter or Disk-On-Module directly to the auto-powered 44-pins connector and save space inside the computer (no more ribbon cable and power supply hack), should you change the 40-pins for it ?
According to your schematic above, the HDD (CS0) is selected when:
A4=1 OR /IORQ=1 OR /M1=0 Correct?
I think his would cause hardware/firmware chaos on the CPC (and although I know very little about the Spectrums expansion specs) I can't understand how this would work on the Spectrum either.
Can you explain what addresses and signal states are required to read and write to the HDD.
Thanks,
Bryce.
Hello TotO
lets see if I can answer those questions.
1. Is Using 8bits on the 16bit data-bus allow for the proper working of all kind of units.QuoteShort answer = No.
Long Answer = Kinda
Using only 8bits on the Data Bus rules out ATAPI Devices (as these are 16bit) i.e. ZIP drives / LS120's and Optical Drives. However you can use Hard-disk devices, like CF cards and even SD cards via an IDE adapter - the only drawback is that you only get to access half of the capacity of the disk device - thus a 512MB Disk would yield 256MB of Data Store on the 8bit Device.
256MB is massive for these little 8bit Micro's, I have over 100 games (including 128k games) in a little under 5MB! so its a bit of a trade off - the adapter is simpler and cheaper to build, but there is a loss in capacity. Now, there are some other things to consider - with Compact Flash as a medium, these devices can be placed into 8bit Memory Mode - so you get ALL the capacity of the card - its very easy to do, and when I re-design the Spectrum adapter it will have a CF port already wired as such.
Another thing is, as there is no byte handling - 8bit data is FAST (well fast for a 3.5Mhz Zilog) with speeds of 145KB a second, sadly with the byte cache and swapping of the 16bit interface its around half that speed (80KB per second)
2. Is it possible to buffer 2x8bit words before sending 16bits to the deviceQuoteYes, it most certainly is, here is my 16bit IDE adaptation of a very clever fellow (Pera Putnik) *see his website projects here* (http://piters.tripod.com/zx.htm)
(http://s6.postimage.org/kt5632vu9/composite.png) (http://postimage.org/)
Please forgive the crudeness of it, Its based on two 2x HC573's to collect / hold the Lower 8bits For (or from) the IDE Bus, and 1 HCT254 to pick up the upper 8bits (from the CPU or the IDE Bus). the GAL20VB handles the full IDE addressing and R/W status from the CPU outpit.
In my adaptation IC3 and IC4 are HC573's with IC2 a HCT245. IC1 is the GAL20VB and IC5 is a HC32 which handles the call to reset the IDE device. you may of noticed that I give the chips names, this is so I don't get lost when I have written this on paper ;)
Again, I have to state that Pera Putnik is an amazingly clever fellow and his project site is a wealth of inspiration!
Now, while this grants the full use of capacity, it also allows for some ATAPI devices like LS120 / 240 disk drives, IDE based ZIP drives (100MB/250MB), it would also allow for a CDROM with a correctly partitioned CD (it wouldn't be ISO standard lol)
However its drawback is speed, due to the CPU Driving this adapter, it has to shift the bytes about, and this slows down access time to about 80KB a second that I have discovered with my tests.
i.e. a 128K Snapshot (space crusade 128)
8bit IDE Adapter - Load time 4.3 Seconds
16bit IDE Adapter - Load time 8.4 Seconds
Same file and same storage medium (64MB IOMega CF Card) just different devices. There is also a program called IDESPEED that also proves this point a little more eloquently as well =)
3. it's really common to add 2.5" CF adapter or Disk-On-Module directly to the auto-powered 44-pins connector and save space inside the computerQuoteYes, this is a very good point and there are other advantages to using CF cards as they are low-power and can take their power from the CPU socket - save having to make a wire loom for powering the device.
Quote from: Bryce on 11:02, 05 September 12
According to your schematic above, the HDD (CS0) is selected when:
A4=1 OR /IORQ=1 OR /M1=0 Correct?
I think his would cause hardware/firmware chaos on the CPC (and although I know very little about the Spectrums expansion specs) I can't understand how this would work on the Spectrum either.
Can you explain what addresses and signal states are required to read and write to the HDD.
Thanks,
Bryce.
thanks for looking =)
lets just bring these bits up
74LS/HC10 (triple 3-input NAND Gate)(http://www.yd-tech.com.tw/media/products/74LS/74LS10.jpg)
and
(http://www.worldofspectrum.org/zxplus3e/images/schematic.gif)
With this hook up CS0 is selected (high) when A4, /M1 and /IORQ are not selected, CS1 is always high however CS0 takes precedence on the device chain. When CS0 output logic drops the second device (on CS1) will respond....
to do this A4, /M1 and /IORQ would need to be asserted.
Thats how I understand it (lets hope its not totally fundamentally wrong lol!) its a dirty way of doing it but it does work.
- looks like I forgot the third NAND gate - sorry about that.
with A4, /M1 and /IORQ not selected this output would be HIGH, as a consequence the output of the third gate would be LOW and CS0 not selected.
Thus to assert CS0 (high) - A4, /M1 and /IORQ would require to be asserted.... hmmmmmm
Well it being a NAND gate, if any of the three inputs (inverted A4, inverted /IORQ or /M1) isn't = 1 then the output of the last NAND gate (going to CS0) is going to go high and enable the drive. So it's A4=1 OR /IORQ=1 OR /M1=0
Bryce.
LOL I am having a slow day today!
I was saying to myself.... draw a truth table Keith.... don't rely on notepad.... do a truth table..... did I listen to myself..... did I chuff!
it seems that rational inner-voice is only heard when it demands coffee or cake!!
:D Ha, I was going to upload my scribbled truth table, but then I thought:
A) Zetro will have already done this
B) That would let the world see how random and scribbled my designs are sometimes :)
As I mentioned above, this would probably clash with many things on the CPC, so a fixed address range would need to be chosen and fully hardware decoded to ensure that the IDE interface didn't interfere with other devices and more importantly, other devices wouldn't cause writes to the HDD!
Bryce.
LOL, oh the irony on both A and B!
Yes, indeed a proper address range would be better way to go. Sadly I am so green when it comes to the CPC that I make grass envious!
Although, I am also currently I implementing an SD card interface based on a Xillinx XC9572XL VQ44, it has the potential to achieve about 245KB a sec, provide a 115,000 bps Serial interface and theres enough room for a PS2 mouse input ;) =)
but I am thinking that this type of CPLD could used and do a little bit of off-loading as well =)
2 times faster by using 8bit IDE (145KB/s) than 16bit IDE (80KB/s), but you lose the half capacity.
Then, why not using the full capacity too ? :D
Each IDE unit come splitted in ODD and EVEN, and you can access both with 2x 8bit data bus, like 2 differents units ?
So, you get the speed and the capacity. (et le cul de la crémière)
Hmmm... With Yareks 8255IDE the FAT system can be used at 180 KB/s. What I want to say is that, 8 bit or 16 bit are not making the difference. It's all about I/O addresses and routines.
Hello TFM/FS
Quote from: TFM/FS on 23:05, 05 September 12
Hmmm... With Yareks 8255IDE the FAT system can be used at 180 KB/s. What I want to say is that, 8 bit or 16 bit are not making the difference. It's all about I/O addresses and routines.
would you have a link to the ide8255-003.zip (http://8bit.yarek.pl/interface/yamod.ide8255/ide8255-003.zip) file ? the on one Yarek's site (http://8bit.yarek.pl/interface/yamod.ide8255/) is down =(
It's only here in this forum that I drool over things I don't understand. But I do hope for an end result... Oh my!
Are you planning any production, or just the design of the thing?
Production for sure!
My want is to ensure that every CPC user that wants Mass Storage should have the opportunity for it, and have it at pocket money prices - under £30!
With this it is my hope to really help the scene flourish more, with lots of people to do that bit more on the machines - from demo's to possibly larger adventure RPG's with lots of graphical data and I am really excited with Future OS and the possibilities of streaming movies, like we do on the spectrum but with much better output from the CPC for sure.
The Spectrum adapter pictured here was made with a slight more expensive PCB fabrication company than last time (hence them being sold at £19.99 ea), however the company (http://www.sitopway.com (http://www.sitopway.com)) have excellent communication and a 5 day turn-round service - its amazingly fast!
Interestingly a fellow WoS'er (http://www.worldofspectrum.org) put me onto a company ITEAD Studio - Make innovation easier (http://imall.iteadstudio.com) whom offer a 10 unit four layer 100mm x 100mm * PCB's - electrically tested for $99!!! - I have not used them yet.... but at that price its amazingly cheap!!!
(MMmmmmm - just thinking off all the mischief I can get into four layers!!!)
I am not to worried about the solution - either if an SD variant is developed as opposed to an IDE solution - the important thing is fast mass storage that can be accessed by the PC to put software on it as well as used under emulation =)
Thats my hope atleast.... currently I am researching the way the CPC address structure - this site is an amazing help!
Wow. Put me down for a couple, will you? :D Seriously, thanks so much for your esprit de corps and your effort. Can't wait!!!
Quote from: Zetr0 on 15:12, 07 September 12Interestingly a fellow WoS'er (http://www.worldofspectrum.org) put me onto a company ITEAD Studio - Make innovation easier (http://imall.iteadstudio.com) whom offer a 10 unit four layer 100mm x 100mm * PCB's - electrically tested for $99!!! - I have not used them yet.... but at that price its amazingly cheap!!!
I have a link for ten 10x10mm PCB 2 (or 4 ?) layers for 25$.
A friend order here. I'll post it when I will be at home.
This project is really exciting ;D
Like I said, the 10 green PCB 2 Layers 10x10mm for $24.90:
http://iteadstudio.com/store/index.php?main_page=product_info&cPath=19_20&products_id=175 (http://iteadstudio.com/store/index.php?main_page=product_info&cPath=19_20&products_id=175)
I hate to rain on the party, this is a really great piece of hardware, but it depends heavily on firmware that doesn't exist yet for the CPC. If this project is going to be a success, we need some serious firmware programmers that know their stuff when it comes to IDE control. Who's willing to look at editing the CPC firmare to handle this? The firmware for the Spectrum +3 (known as 3e) does this on the Spectrum, so it might be a good starting point?
Bryce.
I am interested in making a filesystem rom.
But then rpalmer has HDOS which can do this?
I recently got my hands on a pair of IDE compact flash card readers... I guess it can qualify for CPC/PLUS uses.
what do we have already ?
CPC-IDE - CPCWiki (http://www.cpcwiki.eu/index.php/CPC-IDE)
IDE/8255 - CPCWiki (http://www.cpcwiki.eu/index.php/IDE/8255)
SYMBiFACE II - CPCWiki (http://www.cpcwiki.eu/index.php/SYMBiFACE_II)
SYMBiFACE II:IDE registers - CPCWiki (http://www.cpcwiki.eu/index.php/SYMBiFACE_II:IDE_registers)
SYMBiFACE II:IDE routines - CPCWiki (http://www.cpcwiki.eu/index.php/SYMBiFACE_II:IDE_routines)
Sadly, no old games could manage this... are SymbOS and FuturOS (and apps) the only offical things managing IDE mass data storage ?
Is it actually faster to have Flash memory or is it still limited by the CPC and the IDE technologie ?
On the other hand while handling less MegBytes, those flash use far less space on the table and less mecanical part, perhaps also less power concumption, less magnetic fields too.*
As we know, many commercial games were quite small... using far less than even a whole Disk side (=178K sort of) and even often loading wholly once on a 464...
This enabled many of them to be put in compilations so "they sold a million"...
Is it easy to get those many games loading from such IDE device ?
What about multiloading/bigger games ?
Flash wouldn't have any speed advantages, because as you guessed, the CPC is the slowest part. But it does have the advantage that it needs much less power and only 5V.
Bryce.
Also takes less physical space, no dead cluster fragility, and so on.
Good point to is that having shitons of gigas (as in quite modern HDD) is certainly too much for a CPC... unless you go for long videos full movies in CPC format of course... :D
Something like this you mean : DivIDEo: Streaming video for the ZX Spectrum (http://divideo.zxdemo.org/)
Bryce.
You guys are awesome - its like a call to arms!! =D
how big is the standard ROM of the CPC464 and the C6128 ?
is there any information on ROM paging with the CPC or is it the same as the Spectrum ?
Quote from: MacDeath on 10:23, 08 September 12
Is it easy to get those many games loading from such IDE device ?
What about multiloading/bigger games ?
Many games that cngsoft cracked can be loaded from ide, if standard firmware functions are implemented by the ide filesystem.
Other games could be if the crack was modified.
Quote from: Zetr0 on 13:56, 08 September 12
You guys are awesome - its like a call to arms!! =D
how big is the standard ROM of the CPC464 and the C6128 ?
is there any information on ROM paging with the CPC or is it the same as the Spectrum ?
Personally I would go with writing another rom, which would patch the firmware functions:
cas in open, cas in direct, cas in close and cas catalog.
These would perform functions, or redirect to the next (by keeping a copy of the functions before patching).
This would allow most software to load and run direct from basic.
The amstrad dos was not really intended to be extended.
so I doubt the same approach as for the +3 can be done.
It could be patched and updated, but then you'd need to replace the existing rom to make it work.
This doc describes the cpc's roms that are compatible with the OS:
http://www.cpctech.org.uk/docs/manual/s158se09.pdf (http://www.cpctech.org.uk/docs/manual/s158se09.pdf)
So, 16k, in the upper &c000-&ffff range. You can get the rom when it's sign in function is called to capture existing firmware functions, patch them and allow redirect.
Then have a | command to select/deselect your "drive" so your functions take priority, otherwise you patch in the existing functions.
Your rom has control provided it's lower than slot 7, it can then redirect to amsdos if required (or cassette if amsdos doesn't exist).
cas in open etc here:
http://www.cpctech.org.uk/docs/firmware.pdf (http://www.cpctech.org.uk/docs/firmware.pdf)
So you need to match the same input parameters, the same output data, but use your functions.
use far call (see lower kernel) to install your patches so it can call into your rom.
you can reserve some area with your rom too.
The amsdos rom is too hard coded towards disc access. no cpm style bios or bdos functions are available :(
EDIT: I am "knocking up" some code which will allow you to patch the firmware and call your rom functions instead ;)
Locobasic was great, sadly never really up^dated... even for the PLUS.
Amstrad feared so much the eventual incompatibilities within the whole CPC range I guess.
(and almost failed with the PLUS range, but mostly due to some bad habits from the Games production)
but this doesn't mean nothing could nor should be done now.
Also that quite true a "cheap" proper and modern IDE solution is clearly what the CPC/PLUS range needs.
This whole subject of re-directing the AMSDOS OS functions has been done by me with HDOS.
The HDOS ROM also has the capability to re-direct the DISC Access functions deep within the ROM to go via the HDOS ROM instead. What this means is that is the CPM system were to read a sector of a disc from say drive A then it would be re-directed to HDOS to read from an IDE device such as as a Hard disc.
rpalmer
Sorry, i have been away ;)
This project looks great Zetr0 :D
With respect to the firmware, there is rpalmer and his wonderful work in HDOS and our "work in progress" sd card firmware, you can find the code here. (http://code.google.com/p/cpcsdk/source/browse/trunk/resources/CPCSD/ROM/ameliedos_rom.s) All the firmware compatibility layer is there and we need to add the filesystem code, more a few extra RSXs, but not a lot of time in the last months, well as i said WIP, jejeje.
I should add that i have also created a patched AMSDOS ROM to allow for the disc re-direction to HDOS.
Quote from: SyX on 10:55, 09 September 12
Sorry, i have been away ;)
This project looks great Zetr0 :D
With respect to the firmware, there is rpalmer and his wonderful work in HDOS and our "work in progress" sd card firmware, you can find the code here. (http://code.google.com/p/cpcsdk/source/browse/trunk/resources/CPCSD/ROM/ameliedos_rom.s) All the firmware compatibility layer is there and we need to add the filesystem code, more a few extra RSXs, but not a lot of time in the last months, well as i said WIP, jejeje.
Great :)
I will not continue with my work.
I will only release some source showing how to patch a firmware function to then call into a rom, but nothing more.
Well I am happy to use either existing solution.. For me it is more important it works with AMSDOS functions and works with the hardware I want to use. Which both do.
I would also prefer that if using SD-CARD it uses fat filesystem to make it easy to read/write on pc.
That is all.
So when will the sd card hardware be ready? ;)
@Syx: I read the code, is there a reason why this rom doesn't modify HL to give it it's own space in memory?
You only need to modify HL and return the new value. Firmware will give you the space.
Will this rom work without AMSDOS? I think this is important if the rom/hardware should be used on 464 without DDI-1.
@rpalmer: Does HDOS work on 464 without AMSDOS?
Quote from: arnoldemu on 11:44, 09 September 12@Syx: I read the code, is there a reason why this rom doesn't modify HL to give it it's own space in memory? You only need to modify HL and return the new value. Firmware will give you the space.
Yes, there is a reason, compatibility, we are using the same buffers as AMSDOS and a few extra bytes after $BE7F, because that we don't reserve any extra bytes during the initialization :)
Making a breeze copy files between floppies and the SD, and except games accesing directly to the FDC everything works (although there is a low level interface (http://code.google.com/p/cpcsdk/source/browse/trunk/resources/CPCSD/cpcsd.z80) for accesing directly to the SD sectors).
Quote from: arnoldemu on 11:44, 09 September 12Will this rom work without AMSDOS? I think this is important if the rom/hardware should be used on 464 without DDI-1.
Yes, the rom can work without AMSDOS/PARADOS, it's not a requirement. The actual code only use AMSDOS when the drive in use is not the SD (for using |A, LOAD"A:filename", ...), redirecting the firmware calls to it. That means we only would need to add an extra check during the initialization for finding the AMSDOS rom and it doesn't exist, we'll need to reserve ram.
The actual code is less 2KBs, that leave a lot of space for adding FAT or another filesystems (PulkoMandy's tool for handling his filesystem is basic, but works great and making a fuse driver is something that i always have in my todo list... we only need time, jejeje).
I stumbled accross some IDE MSX stuff in another retro Forum (Gamopat, in French)
here I post the pictures...
(http://i38.servimg.com/u/f38/17/78/96/23/p1020912.jpg) (http://i38.servimg.com/u/f38/17/78/96/23/p1020912.jpg)
Interface IDE BEER202 avec carte compact flash
(http://i38.servimg.com/u/f38/17/78/96/23/p1020610.jpg) (http://i38.servimg.com/u/f38/17/78/96/23/p1020610.jpg)
Slot expander 4X + FMPAC + BEER202 + FlashROM SCC + extension 64ko
do someone knows about this ?
Is this not a cartridge port to IDE converter
some pages and topic on this perhaps...
http://gomsx.net/hansotten/index.php?page=beer-ide (http://gomsx.net/hansotten/index.php?page=beer-ide)
Beer 202 IDE interface partitioning tool | MSX Resource Center (http://www.msx.org/news/software/en/beer-202-ide-interface-partitioning-tool)
Beer 202 IDE interface | MSX Resource Center (http://www.msx.org/forum/msx-talk/hardware/beer-202-ide-interface)
Is MSX extension port far different than CPC ?
I mean both machines are supposed to be Z80 based, but MSX had a lot of extra features and the standard had sweet hardware peripherals all compatibles in MSX.
A good point would be to have IDE interface as standard part for all newcoming RAM+ROMbox extensions.
Also it looks like MSX scene has a nice bunch of extra Hardware available, be it homebrew.
Also : Wouldn't this topic be at a better place in the Hardware section ?
Post edit : thx Gryzor, still as efficient as ever. ;)
After stopping all the drooling, yes, I'm moving this to HW. Didn't notice it was here.
What do we have?
DOS for the CF: The one from Syx for the French interface and HDOS
My question and desire: Is it doable to use a common format for the devices?
Jumping on that :D
Quote from: TFM/FS on 23:05, 05 September 12
Hmmm... With Yareks 8255IDE the FAT system can be used at 180 KB/s. What I want to say is that, 8 bit or 16 bit are not making the difference. It's all about I/O addresses and routines.
How do you acheive a 180KB/s ?
Doing my own test with my own interface, I am limited to one byte every 8us, which gives 125KB/s peak. Real BW is the limited by the loop unrool factor and FS overhead.
core loop code is the following (repeated for loop unroll):
in a,(C)
ld (de),a
inc de
Do you have any faster code suggestion?
Thanks
gerald
The CPC cannot achieve a speed of 180 Kb/s as the VGA will no doubt interfere in data transfers. I have seen the source for the symbiface and it can achieve at most 140 Kb/s (or there about).
If the CPC were capable of 150 Kb/s, then it is possible to access CD writer hardware (it may still be possible with latest devices which have buffer underrun handling capabilities).
The only means by which the CPC could get high data transfer speeds is if the Z80 DMA were somehow able to work without interference from the VGA (but this is where the stumbling block is).
rpalmer
Ok, so no undocumented or magic instruction I would have missed ;)
The 125kB/s are measured on CPC, and include the VGA interference.
Regarding DMA, while I had only looked on datasheet, the Z80DMA should be able to handle the READY(WAITn) signal from GA, as the Z80 does.
Quote from: gerald on 19:44, 19 September 12
How do you acheive a 180KB/s ?
Well, that's done the following way....
First I have to mention that there are four I/O ports to read a data byte, they all provide the same data byte, that's the smart part of the hardware. Not let's see the software...
ld hl,target-of-data
ld bc,read-io-address
ld d,b
---- the following part will be repeated 64 times (but you also can go down to 8 times if you need more RAM ----
INI
INI
INI
INI
LD B,D
------------
So to read four data bytes you need 21 ys. So in one second you can transfer 186 KB
EDIT: We are not talking about theories here. Actually I developped and tested file-loading functions that way, and in reality it works with slightly more than 180 KB/s, not 186 KB though.
Quote from: rpalmer on 20:25, 19 September 12
I have seen the source for the symbiface and it can achieve at most 140 Kb/s (or there about).
rpalmer
With my code I archive 160 KB/s when using a SF-II (in theory I need 6 ys for one byte).
Thanks TFM/S for the details
Was thinking about INI, but symbiface doc on wiki does not mention the address mirroring.
My HW does not allo such mirror, mainly to save IO space.
If wiki is right, you IO address will range be FF08, FE08, FD08, FC08 ?
Quote from: gerald on 21:42, 19 September 12
Thanks TFM/S for the details
TFM is enough ;) You are welcome :)
Quote from: gerald on 21:42, 19 September 12
Was thinking about INI, but symbiface doc on wiki does not mention the address mirroring.
My HW does not allo such mirror, mainly to save IO space.
The SF2 does NOT have that. I referred to Yareks IDE8255. Only his card has that feature.
Quote from: gerald on 21:42, 19 September 12
If wiki is right, you IO address will range be FF08, FE08, FD08, FC08 ?
See here: IDE8255 - CPCWiki (http://www.cpcwiki.eu/index.php/IDE8255)
Sorry for the late update - sadly I am dealing with a house flood at the moment, thus my time is limited, however I have since put-together a C128 as a test bed in the office - I have two devices to do some tests (an SD based interface and an IDE based interface)
So when I get some time there will be some fun (and pictures!!!)
while reviewing lots of sources, I cannot seem to find a schematic or even a PCB layout for the the IDE8255 - anyone got one handy? - Yarak's site comes back with missing links sadly =(
I seriously hope your house doesn't suffer much damage.
I also seriously wish you'd left those c128's in the water.
Ooops :laugh:
I meant CPC6128 - sorry about that.... I don't currently have a C128, in fact the only commie 8bit I have is a VIC 20 thats on loan.... but I plan on getting a C128D for much mischief and mayhem soon =)
Heheh just kidding. I've always wanted a C128, I remember being a bit mesmerized by its useless versatility at the neighborhood micro store...
indeedy.... the C128 has a Z80 in it..... although sadly its only effectively running at 2Mhz
(mainly because of half-assed rom routines and badly written CPM/3 software)
It would be nice to get the opportunity to open that one up a bit ;) =)
I hope that you have exhausted your quote of bad luck Zetr0 ;)
Quote from: Zetr0 on 13:38, 25 September 12
while reviewing lots of sources, I cannot seem to find a schematic or even a PCB layout for the the IDE8255 - anyone got one handy? - Yarak's site comes back with missing links sadly =(
Well, once I had access to that. Must check my other computer...
However, Yareks solution seems to be very well done. It's not even (todays) fastest, it also provides plugs for hard-disc and memory-card. So no adapter is needed.
IMHO it would be great if we could stay software compatible. :)
What I don't understand is that Yarek "hides" his designs behind a registration/password system and isn't part of the scene. He really needs to be more open with his designs and be a bit more active in the scene.
Bryce.
Well, there's no accounting for personal psychology. If Yarek feels introverted and does stuff for himself, I guess it's his right, much as it might be to the world's distaste...
QuoteHeheh just kidding. I've always wanted a C128
C128 is quite nice... sadly it should hve been supplied with more colour palette and perhaps a few more Video modes IMO.
Concerning design, the "little Amiga500 clone" look is nice too.
And as usual I always prefer 8bits with more than 64K.
Oh, and it has a Z80 too (despite slow one)
Quote from: Bryce on 20:11, 25 September 12
What I don't understand is that Yarek "hides" his designs behind a registration/password system and isn't part of the scene. He really needs to be more open with his designs and be a bit more active in the scene.
He produces for different computers and has a real life too. His time is limited. But I always got my answers when I emailed him.
It's his decision if he released his schematics or not. It's accepted for any PC hardware producer, it should be accepted for other systems too. But don't get me wrong, sure it would be great to have this data in the Wiki for example.
My guess here is, that he just has not enought time to update his HP. I know he is very busy.
That's ok, but it doesn't explain why he has everything behind a password.
Bryce.
It does: he doesn't feel like sharing :D
Just get your account! :o :P 8) :laugh:
Last times I tried to register on Yarek's site the links were dead and I couldn't register an account, I had assumed that the site was no longer being maintained. This is why I agree with Bryce, if his ideas aren't shared with the general community then there is always a risk they could disappear forever. It is his choice of course, but if the hardware only exists in isolation then it's almost as if it never did exist.
That's true, it should be moved in the CPCWiki :-)
Ars gratia artis...
Na dann zurueck zum Thema 8)
Hello!!
I am working in an expandable easy I/O board for the CPC, derived from my work of attaching a Wiznet module to our computer. Because I'm using a GAL for address decoding and using only one from 8 outputs to activate the Wiznet I have redesigned it to use more signals and use some kind of cartridges, each one with it's own IO address space (Autoconfig, you plug the hardware cartridge and the slot number gives certain IO range... good for prototiping and not taking care for address decoding...)
Well, one of my cartridges pretends to be an IDE interface, 8 to 16bits data bus, IO space and data port Symbiface compatible. It's a mix between GIDE (2 state GAL based data port) and XT-IDE (Latching/buffering idea derivate) so you don't need the expensive and rare to find exotic buffers from GIDE and don't have the 2 separate data ports from XT-IDE.
I have made a quick independent scheme for an independent interface.
Be careful because:
-It's NOT TESTED
-It's WORK IN PROGRESS
-It's all THEORY
-It's open to suggestions/revisions/rectifications :) SCHEME: http://imageshack.us/a/img72/1820/gxide.png (http://imageshack.us/a/img72/1820/gxide.png)
EDIT: New URL... Works?
GAL 1 CODE
TITLE CPC GXIDE GAL IC1
PATTERN 01
REVISION 03
AUTHOR Tilmann Reh & KaosOverride
COMPANY AutoMeter
DATE 27.10.2012
CHIP GIDE1 PALCE16V8
tog1 a0 a1 a2 a3 /wr /rd /selq null gnd
/oe lh /iord /iowr /enta /entb /lout lin tog vcc
STRING CS1ADR '(/A3 * A2 * A1)' ; CS1 Addr. x6..x7
STRING DATADR '(A3 * /A2 * /A1 * /A0)' ; CS0/Data Addr. x8
STRING TFRADR '(A3 * (A2 + A1 + A0))' ; CS0/Task Addr. x9..xF
SIGNATURE TR-GIDE1
EQUATIONS
LH := /LH * /TFRADR ; FlipFlop: LSB/MSB toggle,
; reset at Task File accesses
/TOG = (DATADR+TFRADR) * SELQ * (RD+WR) ; LH-Clock: Data & Task File
LOUT = DatAdr * SELQ * (Rd+Wr) * LH ; ena. data out Latch
LIN = DatAdr * SELQ * (Rd+Wr) * /LH ; reg. data in Latch
IORD = (TFRAdr+CS1Adr+ DatAdr*/LH) * SELQ * RD ; read accesses to drive
IOWR = (TFRAdr+CS1Adr+ DatAdr*LH) * SELQ * WR ; write accesses to drive
ENTB = DatAdr * SELQ * Wr ; en. Transc. B Enable
ENTA = (TFRAdr+CS1Adr) * (Rd+Wr) * SELQ ; LSB direct transfer (TFR/CS1)
+ DatAdr * RD * SELQ ; LSB transfer (Data)
;ENHI = DatAdr * LH * SELQ * (Rd+Wr) ; en. MSB output to drive/Bus
;
;ENLO = (TFRAdr+CS1Adr) * (Rd+Wr) * SELQ ; LSB direct transfer (TFR/CS1)
; + DatAdr * (/LH*RD + LH*WR) * SELQ ; LSB transfer (Data)
GAL 2 CODE
TITLE CPC GXIDE GAL IC2
PATTERN 01
REVISION 04
AUTHOR Tilmann Reh & KaosOverride
COMPANY AutoMeter
DATE 10/17/12
CHIP GIDE2FIX PALCE16V8
a0 a1 a2 a3 a4 a5 a6 a7 aextra gnd /iorq
sel exp /cs1 /cs0 ia2 ia1 ia0 /selq vcc
SIGNATURE HP-GIDE2
EQUATIONS
sel = /a4 * /a5 * /a6 * /a7 * /aextra ; address decoder (50H)
selq = sel * iorq * (a3+a2) ; interface access x4..xF
ia0 = a0
ia1 = a1
ia2 = a2 ; signal buffering
exp = sel * iorq * /a3 * a2 * /a1 * /a0 ; x4 (22V10 only)
cs1 = sel * /a3 * a2 * a1 ; x6, x7
cs0 = sel * a3 ; x8..xF
It's more complex than the +3E one but it pretends to use existing software
I saw the Spectrum +3 one being demonstrated at Play Expo last weekend. Looking forward to something similar for my 6128.
(I was the one who pointed out the spelling mistake 8))
@KaosOverride
That's Amazing!
(its also very reminiscent of Pera Putniks 16bit IDE solution for the Spectrum =) )
I shall develop a PCB and a prototype - will this work for future OS as well?
what ROM's will I need
Quote from: MugUK on 10:51, 19 October 12
I saw the Spectrum +3 one being demonstrated at Play Expo last weekend. Looking forward to something similar for my 6128.
(I was the one who pointed out the spelling mistake 8) )
LOL.... what spelling mistkae.... I dont make mistakes ;)
@Zetr0
It's supposed to be Symbiface IDE compatible, almost mimics same IO port range and it's functions. So you hace Symbos, FutureOS, BonnyDOS and anything compatible with that interface.
Take in mind it can fail, it needs revision :)
EDIT: This should help, the scheme for Proteus http://www.kaosoverride.net/cpc/hard/easy4cpc/GXIDE.zip (http://www.kaosoverride.net/cpc/hard/easy4cpc/GXIDE.zip) (Again the hardlink fail, you have to COPY the URL to a new windows, sorry)
thanks for the link CaosOverride!
What is a .DSN extention ?
The design scheme file for Proteus/Isis 7
awesome !
my sincere thanks -
Now off to download some software =D
I have enough bits to put together a rudimentary prototype =)
We could refine this to use a single XC9572XL - we could then include a PS2 mouse connector and possibly a 115kbps Serial interface *although the latter would get interrupted when the cpu clock is interrupted unless its made async.
Hmmm possibly I am a little wired with caffeine and over thinking it... lol
Yeah! Pera Putniks interface is a great piece of hardware, it uses the same 8/16 bits multiplexer as the XT-IDE, which for writing has de handicap to first write the D8-D15 byte and then the D0-8. So you have to switch bytes and take some more time...
But the GUIDE used a GAL for a 2 step writing/reading data in an unique port, but an expensive and rare pair of latch/transceivers. I think I have been able to use some cheap chips based in a heavy redesign of Pera's/XT-IDE's multiplexer and recode the GAL for the new needs :)
EDIT: relooking the scheme, maybe the OR gates can be reordered to prevent possible timing issues reducing the steps, they are 4 levels for the most complex block...
Maybe
U7A direct output to /GAL1
U7B direct output to /GAL2
U7C A9 and A7 input, output to /GAL3
U7D A6 and A5 input, output to /GAL4
A4 to /GAL5 as is
Same result, but maximun 2 steps/levels of evaluating gates :)
Missed this thread, this sounds promising (I guess), impressive and out of the blue :)
Soon I will receive the components and I will do tests on a prototype board. I will comment the results here :)
@KaosOverride
I am currently building a prototype from your schematic my friend, but as a Z80 plug-in
with luck this weekend will see me test it in the CPC6128 =)
just got to do a bit of reading up on how to get Symbios and Future OS working =D
Well, to install FutureOS, you just put the four ROMs at ROM selects 10-13. To make it work with IDE, well, depends on your card - I have to update the IDE ROM (5th ROM, still wip).
The little changes I mentioned above at the decoder. (To reduce a little the latency)
NEW SCHEME : http://imageshack.us/a/img18/3742/gxide2.png (http://imageshack.us/a/img18/3742/gxide2.png)
EDIT: Hope new URL works fine!!
Your link just forwards me to an advert. Can you upload it to the Forum?
Bryce.
Hi,
You have to COPY the link into a new WINDOW to get to the right page. If You goes directly from the link, You ends up with the ads ! ! !
Don't ask me why it's so :-\ Perhaps it's one of life's big questions ? ? ?
Yours
Terje Grind
NORWAY
Sorry, is just my hosting that don't like linking that way... Changed to imageshack! Looks like working!!
I think my site's problem is something with referers with the forum, etc... , detecting that the previous URL was not from the same site... pfffff :'(
Quote from: KaosOverride on 17:50, 02 November 12
The little changes I mentioned above at the decoder. (To reduce a little the latency)
NEW SCHEME : http://imageshack.us/a/img18/3742/gxide2.png (http://imageshack.us/a/img18/3742/gxide2.png)
EDIT: Hope new URL works fine!!
I must report this post to the moderators.... ITS AWESOME! =)
LOL Imageshack has been down for a time this afternoon... :D
(http://imageshack.us/scaled/landing/827/fbimg13663895047831800.jpg)
Hope to test it this Tuesday :)
Have added an easy Romboard for 64k Eeprom. Just for BonnyDOS + BonnyExtra1 + BonnyExtra2 + ParaDOS. The idea is to make an easy mimic of the DivIDE for spectrum, with built-in OS. Roms are mapped as 2-5.
The Romboard is easy to disable, just don't solder anything in its rectangle and use your favourite ramcard/rombioard/megaflash xD
Will notify about any advances ;)
Great! When will they be available to purchase? :)
FANTASTIC!!! :D :D :D
An ide adaptor would be great even better if even remotely possible would be a USB connector adapter for external HDS.
I can imagine Amsdos wold throw a wobbler, but if the emulation of its controller was done correctly then maybe just maybe that would work.
I'm not a kind of bussines man, I will free all the material about this boards, schemmes, gerbrer files, GAL binary, etc so anybody could make it.
Because of the place I ordered the boards, I have 10 of them. A full populated board with no assembling costs just the board and components, is around 30-35 euro for me. But first I must test it works!!
Anyway this project will be fully open when I get it to run. ;)
Quote from: dcdrac on 10:51, 21 April 13
An ide adaptor would be great even better if even remotely possible would be a USB connector adapter for external HDS.
I can imagine Amsdos wold throw a wobbler, but if the emulation of its controller was done correctly then maybe just maybe that would work.
I have a kind of IDE to SD adapter so it's a must to test.
that sounds like a goer to me
Why not fit it with a compact flash adapter? You can buy 32GB Compact flash cards quite cheaply and I cannot imagine how you could ever need more than about 8gb of space for the CPC.
I would like to formally put my hand up for one of boards up for grabs when they become available. I would much prefer one ready to go so am happy to pay for your time to install the components, if you are willing to do so.
Great project, nice layout too. Also excellent that you will be releasing all the data!
Bryce.
/me wants one.
Arrrrghhh!! Bad news.. My programmer is not compatible with the GALs. Hope a new one should arrive in a week to solve it... Well, is not a game over :)
Great to see the progress here :) :) :)
Debuging the GALs.... One of the ICs is actively blocking the data bus when is supposed to not be active....
Nice to see that this project is still alive; Hope you will find a solution to your issues ;)
What the... The ENTA and ENTB signals from the GAL miss the LH in the equation which is the "state" for reading the 0-7 or the 8-15 bits for the DATA register. (For people that have not paid attention to the circuit and sources I attached in this thread maybe I'm looking as speaking martian... :P )
What in hell have I done? I was convinced that the source for the GAL was using the LH signal :o It MUST use the signal...
Well, something is clear now... Hope work let's me some time for testing...
Awwww Yea!!!!!!!!
GAL2 (I/O management) had a very bad mistake in some pin assigments, also some inverted signals... Corrected
GAL1 (IDE DATA Control) also corrected the INTA and INTB thing...
Is strange to have things running at the first attempt :D
(http://cdn.memegenerator.net/instances/400x/27591634.jpg) (http://cdn.memegenerator.net/instances/400x/27591634.jpg)
Now looking for some free time for testing :)
Also edited my post with the GALs code ;)
Looking forward to seeing this in action!
Cool Project ! :D
Please let us know if there are some fresh news.
How's this going? Any progress?!
+1.
I wanna one!
..and after reading 7 pages of very interesting chat about the possibility of attaching a hard drive to my CPC6128 it (yet again) fizzles out to nothing... I too have tried to sign up to yareks site with no luck - dead page - thought I might learn something about attaching an IDE nterface to the 6128... I thought I would also track down the guy who was so positive he would release the solution to the public for less than $30 but well, Google led me to a dead end there as well, he seems to have disappeared into development hell, Don't get me wrong guys, while I have the technical ability to implement the result, I certainly don't have the understanding to contribute in the topics you guys are talking in - or of the concepts of whats behind it... most of what I have just read is w-a-ay above my head, but then I'm a near 60 year old who expects the world from the younger generation hahahaha! Ah well, while I'm waiting for my new drive belt to arrive, I'll fire up WinAPE and play Bruce Lee one mre time... or maybe BombJack....
Your choices are:
- Try to email Jarek
- Try to get a SF2
As far as I know, Jarek only did hardware, no new Firmware? As I mentioned before, the hardware is the easy part, it's the firmware (OS) that's lacking.
Bryce.
Well, I got a patched AmsDOS from him.
Source codes for accessing his device are available too.
Is there an Amsdos extension for an IDE filesystem (FATxx) access available?
Something like that, but it's too long ago. I don't remember precisely. Have to take a look at it in one months.
Quote from: rpalmer on 20:25, 19 September 12
gerald
The CPC cannot achieve a speed of 180 Kb/s as the VGA will no doubt interfere in data transfers. I have seen the source for the symbiface and it can achieve at most 140 Kb/s (or there about).
rpalmer
I'm actually trying to work out how fast a CPC can transfer data in memory, I am likely totally wrong in my calculations... but...
Let's say 16kb... 16384 bytes. an LDIR takes 21 t-states per iteration except the last is 16, so let's just round it to 16384 x 21 = 344064 t-states. I read a Z80 at 10Mhz takes 1.2 microseconds to ful-fill 12 t-states (source: http://www.ganssle.com/articles/abuscyc.htm). So... that would be 34406.4 microseconds. Since the CPC is about 3.3Mhz, let's say it takes about 3x longer than a 10Mhz Z80, so... 103219.2 microseconds for a full 16kb using LDIR. So far that is about one tenth of a second. Some smart coding can code a loop that is 19% faster than that LDIR (source: http://map.grauw.nl/articles/fast_loops.php)... so let's make it 83607.552 microseconds to copy 16kb data. So how much data can we transfer in a second? Perhaps 191kb/second assuming no other logic than the 16kb transfer... but we want a tiny bit of loop logic, so quite likely somewhere between 180kb/second to 191kb/second to sustain a transfer to a "memory mapped" hardware device. Can that memory mapped hardware device sustain that transfer rate? Let's hope...
If the AMSDOS extension uses IDE-ATA registers, 8-bit mode and LBA they may work with uIDE-16 (http://www.cpcwiki.eu/index.php/UIDE_Universal_IDE_adapter_cards_for_Z-80_computers). All that is required is the I/O base address of the driver, then you configure uIDE-16 appropriately using jumpers. Provisionally, I have it at the same address range as CPC-CompactFlash which is FEF0-FEF7.
However, the PCW (soon to be 6128) driver supports CP/M Plus only, and implements a native CP/M disk format, so it will not be compatible (unless the AMSDOS extension does the same).
@TFM (http://www.cpcwiki.eu/forum/index.php?action=profile;u=179) : If you have the AMSDOS extension code would you like to share it with me?
CP/M is able to use more then one partition or volumes via an offset table. I don't know the technical details, but would it be able to use both a 120 MByte FAT16 at the beginning of the DOM and a 8 MByte native CP/M volume at the end?
What I have read is that the data table or information are not stored on the drive itself. The CP/M has to be adapted / patched?
CP/M can handle at most 512Mb of data on a given storage device (I have the CP/M 3.0 bible, it has over 500 pages of information about the OS). It is due to the way CP/M accesses records and not a physical limitation in hardware.
Also CP/M does not know about "partitions", so any offset table is a custom support function to achieve a drive like system (E:, F:, G:, etc). This is due to it original design which was aimed at a hardware level to access storage devices as a whole device and not burdened with partitions on any device.
rpalmer
Why not make a modern ide interface with at least a 1mb buffer that is memory mapped? Just using the IO ports is like having a modern graphics card with no gpu. You can even consider an fgpa or a perhaps a microcontroller on the ide interface so it does the work of filling up or saving the buffer...
@zhulien (http://www.cpcwiki.eu/forum/index.php?action=profile;u=58): Your timings are for a "perfect" case and unlikely to be real world.
For example, what happens when you want to load data to the location where your memory mapped registers are located?
You now either have to load to a different location, disable the registers and ldir it into place, or have the ability to remap the location of the memory mapped registers have two load routines and then have to plan your loading more carefully. I/O is a bit slower but avoids that.
For memory i/o your fastest case is possibly a list of LDI.
This is 5us, but then you need more than 1 consecutive location for transfering data.
ld a,(de)
ld (hl),a
inc hl
is closest with one memory mapped register pointed to be de.
this comes to 6us per byte.
Another thing that will alter your timings is the seek timing of the device. For mechanical drives this adds a small cost, for SSD and DOM it's probably negligible. For your PI you may need to factor in the speed of the SD card reading from the PI...
(In the case of disc loaders, people often forget the head load time, the head unload time, the step rate and other factors that alter the results).
Quote from: HAL 6128 on 20:13, 08 February 17[/size][size=0px]CP/M is able to use more then one partition or volumes via an offset table. I don't know the technical details, but would it be able to use both a 120 MByte FAT16 at the beginning of the DOM and a 8 MByte native CP/M volume at the end?What I have read is that the data table or information are not stored on the drive itself. The CP/M has to be adapted / patched?[/size]
[size=0px]
Hmm, yes that's possible., but you would need the CP/M data at the start of the disk.
Yes, patch.
You're correct about the way the driver works, it assumes the drive is a contiguous array of sectors and addresses them by LBA. The CP/M drive letter is used to provide an offset so there is no partition table. Thus, a CP/M "partition" is not the same as a hard drive partition that you would set up on the drive itself using fdisk.[/size]