Was thinking last night. Would it be technically possible to have a DKTronics compatible 64k Ram expansion that plugs into the CPU socket to bring the cpc-464 and cpc-664 up to 128k internally?
The advantage of this would obviously be to free up the expansion connector on the back of the machine for an M4, Play2CPC or Dandanator. Oh and it would be much neater and more reliable, less prone to knocks and wobbles.
It may be possible that the DKTronics standard cannot be implemented on the CPU socket but I am hopeful it is, and can be done.
Quote from: CraigsBar on 10:23, 06 October 22Was thinking last night. Would it be technically possible to have a DKTronics compatible 64k Ram expansion that plugs into the CPU socket to bring the cpc-464 and cpc-664 up to 128k internally?
The advantage of this would obviously be to free up the expansion connector on the back of the machine for an M4, Play2CPC or Dandanator. Oh and it would be much neater and more reliable, less prone to knocks and wobbles.
Sure. You have probably read it (but not took care) on the other topic last days. ;D
Hey what! No I only got my CPC664 up and running yesterday (it arrived last week and the membrane came yesterday)
But.... Are you making these? if so can I order 3 of them please (2x CPC464 and my CPC664)
Well... I have drawn the schematics some years ago, and the PCB layout early this year only.
I don't know when I will have a spare time to test the design. I hope that do not hurry.
Toto yesterday mentioned that he has already developed such an internal expansion. Unfortunately I don't know if it's available somewhere. Edit: just saw that he already replied
I have designed a PCB for an internal expansion up to 512K which should be compatible with the 6128 but it lacks proof that it works. I will probably work on this over the next couple of weeks (unless life has other priorities).
That's what I came up with yet:
The CPU socket basically has all required signals. The only problem is ROM access. On the CPU socket, we have no indication for that. To keep it simple, we need feedback from the Gate Array if ROM is accessed. Soldering should be kept to just 2 connections. (Maybe even that isn't required and we can use pin clips, at least in computers that have enough space. The Vortex SP512 expansion was using this method in a perfectly fine way to connect to a signal it had no direct access too.)
high level this is the logic:
- A GAL/PAL with logic similar to the PAL of the 6128.
- WR is not passed through directly. The PAL passes it through, if it's an IO request or data is sent to the first 64KB.
- I can't control RD in the same way as I need the information from the GateArray, if it's ROM access and I assume I will only get that, if the gate array has to deal with a real read access. Therefore ROMEN will be fed back. If ROMEN is recognised by the PAL, no data will be read from the SRAM.
- Last but not least, I will set RAMDIS, whenever data is read from the SRAM. As I can't disconnect the RD signal, data would otherwise be put on the bus from the internal RAM, whenever I access SRAM.
Not sure if that makes sense or will work... let's see.
Edit: PCB is quick and dirty, not optimised yet, just to get an idea about the size
I'd be interested in 2 of these myself for my 2 464's! :D
Certainly demand is there then, that's 5! :)
I really hope this happens.
CPC464 with internal 64 KB RAM expansion.
Well, include the PAL of the 6128 and you get a 464 being really compatible to the 6128. The so called dk'tronics standard is only half the way compatible to the 6128 anyway.
Quote from: GUNHED on 11:24, 07 October 22CPC464 with internal 64 KB RAM expansion.
Well, include the PAL of the 6128 and you get a 464 being really compatible to the 6128. The so called dk'tronics standard is only half the way compatible to the 6128 anyway.
(Parts of) the PAL logic yes, the PAL itself no.
The PAL is for RAM banking only? Isn't it?
The PAL allows RAM bank switching, extra paging modes, split /CAS to /CAS0 and /CAS1 to be able to use a second set of ICs for the internal expansion on the same bus and disabling it when required.