Designing a CPLD replacement for the GateArray

Started by SerErris, 15:26, 27 January 22

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SerErris

Quote from: gerald on 13:53, 29 January 22
Too small  ;)
The ink/border registers already require 17*5 bit = 85 DFF. You only have 72.

My first prototype used a XC2C256.


Okay, thanks for the input, I did not have any tool to check if it fits, and also did not know what the driving factor is. That is much clearer now.


What speed grade did your prototype run on? Is the cpld speed critical? Or would it run even on a 20ns grade?
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

pelrun

 If there's any route in the final logic after PnR (which is a heuristic search, so the results are not entirely determined by the input design) that takes longer to settle than the clock period, you'll have problems. Since it depends entirely on what logic is generated; the only way to know for sure is to set the timing constraints in the Xilinx tools and have it check timing closure.

SerErris

I do not think this is a problem, as all the CPLDs in question are in general supported to run with >133Mhz ... This design is pretty slow in running only at 16mhz clock speed.


So I do not think that this is a real issue, but will definately double check in the timing simulation.


Also the Fitter does some work to optimize that as well, but for that it needs to undertand the timing constrains.
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

pelrun

Slower clocks make it easier to achieve, but in and of itself isn't sufficient to guarantee timing closure for all designs. I could write HDL that synthesizes a massively long chain of combinatorial logic that exceeds the timing constraints even on really slow clocks. Which is why you generally want to go wide instead of deep when designing programmable logic, and things like one-hot encoding (which trades off combinatorial logic for increased flipflop use) are preferred. I don't think the GA has anything particularly like that, but the point is it's not hard to get the computer to guarantee it before settling on a part.

SerErris

Quote from: gerald on 13:53, 29 January 22
Too small  ;)
The ink/border registers already require 17*5 bit = 85 DFF. You only have 72.

My first prototype used a XC2C256.


strange ...


@Gerald how many registers does your implementation require when fully implemented?


Mine is 166 .. but I remember (maybe wrong) that it supposed to be 88 ... ???


Something is massively weird with my implementation.

Is it possible that the compiler is acutally adding registers/latches unwanted?


I need to count the registers from the schematic...
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

gerald

Quote from: SerErris on 22:43, 01 February 22
Mine is 166 .. but I remember (maybe wrong) that it supposed to be 88 ... ???
88 is only the ink/border registers. There are many others  ;) 166 is in the right range.

SerErris

#31
Okay .. I counted the schematic.


166 is the exact number of registers (flip-flops).


However Quartus has created 169 out of it ..


In the compilation it first does the analysis and says it is 166, but the final build states 169 ... strange. So the compiler added 3 registers to it, which is propably an unwanted effect, and I need to find out why...

/Edit: The registers getting added by quartus optimzation ... not a concern as long as there are enough logic cells and registers available.
As I a currently compiling on a Cyclone 5 FPGA for code testing, I have plenty of registers and LEs to run this ;-) .



Dedicated logic registers   171   
-- By type:       
  -- Primary logic registers   165 / 112,960   < 1 %
  -- Secondary logic registers   6 / 112,960   < 1 %
-- By function:       
  -- Design implementation registers   166   
  -- Routing optimization registers   5   
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

SerErris

Okay, gentlemen, I still do not have a solution that gives me all the things I want:


1. Fit in the footprint of the DIP-40 socket - the PCB should not be much bigger and directly in there.
2. Support V5 directly without buffers - they are making it even more expensive due to board complexity and additional components requried.
3. Enough PINs on the package (@5V 35 IO pins + 4 JTAG pins (+VCC,GND etc).
4. User programmable without extra components (would make it more expensive).


I have solutions for 3 out of 4, but I cannot get anything together that fits all.


5V is a problem nowadays, so I would most likely need to go with a 3.3V solution, that is at least capable of driving all the control signals. It would still require input buffers (2x10bit) to convert 5.5V down to 3.3V and depending on the CPLD/FPGA device I also would need a second voltage (1.1-1.8V). That creates a lot of components on the board (1-2 Voltage Regulators + the 0.1 caps).


One solution in my mind (now juggling with it) would be based on a Efinix Trion T8 or T4 FPGA. It comes in a 5x5 mm housing providing some 5x IO pins but needs an external flash module. Also it needs two voltages (3.3V and 1.1V).


However it is a small FPGA with a lot of power ... (much more than required). And the package size of it actually allows for small PCB. However it also requires 4layer PCB (or you cannot route all the PINs.

So what I want to say .. it will take a little bit longer to have a working design.

A design based on the old EPM7256AE will also work but requires a larger design. It has the benefit of allowing direct integration into a 5V system without any other things to consider.

I think I will make one prototype of that for me to validate the implementation, but that is also not possible on large scale due to non availabilty of the chips in large scale at low price.



Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

SerErris

Interesting,

after having paused all that for month, because I could not get my hands on anything reasonable, I now looked at the ICE40 and the XO2.

Both come in a QFN48 package and delivering up to 40 I/O Pins. 

XO2 - cannot get any

But ICE40 you can get. However it requires some additional hardware:
1. Serial Flash EEPROM for the FPGA code
2. 2 Voltage Regulators (to get 3.3V and 1.2V)
3. Level converters (2x 10) for inputs + either 2x10 or 4x1 with output enable for just the graphics parts. I think the rest is not critical and will work.

The interesting part in the ICE40 is, that it is available in numbers. I am pretty much surprised. However as I said the downside is - need a serial Flash, and that needs a complete different approach of programming, but can be programmed with a very simple UART converter for USB and some code.
Also it is very low power ... so Actually I think it could be much less power consumption than the original electronic heater we had in the 464s ... aka 40007


The last option I now recognized is a gowin FPGA.
That does a lot of stuff out of the box (e.g. no S-FlashEEPROM, 3.3V core voltage) ... so it would need less parts. On the downside .. no idea how to program that thing. Anyone has any experience with it?
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

RetroCPC

I work with the ICE40 series, and I would be happy to work with you on the design of a 4 layer PCB with 5V to 3V3 translators, and the regulators required...

I have a full SMT line so I could also manufacture a small number of PCB's...

IMO the ICE40 range of FPGA's is a really great solution...

SerErris

Hi, thanks for the offering.

I do think a collaboration makes sense - if we match up.

E.g. it needs to be on KiCad - as I do have no interest into investing another learning curve into anything else. In the end it is an hobby.

Also I think it needs to be a 2 layer design. A 4 layer design is just very expensive in a small manufacturing volume and esp. prototyping will kill you with cost.

So 2 layer design it is - which also rules out BGAs. They are in the size we need them by far to small to route them on a 2 layer board (including power and GND as well). So it needs to be the QFN48 package. But that will fit on a small board.

If you could start with a very typical schematic for the ice40 - including the two voltage regulators and the flash circuitry (e.g. resistors required and what not), that would be already of great help. 

I can then add all the stuff around the 40007 (voltage translators and buffers where required).

A github repository would be nice (I can create one if required).

Suggestions?
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

GUNHED

Why not using 64 colors instead of 32?
Color selection actually uses &40-&5F, the values &60-&7F are free and could be used.
Imagine a CPC with 64 colors. All the brown and gray we miss.  :)
http://futureos.de --> Get the revolutionary FutureOS (Update: 2022.03.09)
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RetroCPC

Quote from: SerErris on 15:56, 20 October 22Hi, thanks for the offering.

I do think a collaboration makes sense - if we match up.

E.g. it needs to be on KiCad - as I do have no interest into investing another learning curve into anything else. In the end it is an hobby.

Also I think it needs to be a 2 layer design. A 4 layer design is just very expensive in a small manufacturing volume and esp. prototyping will kill you with cost.

So 2 layer design it is - which also rules out BGAs. They are in the size we need them by far to small to route them on a 2 layer board (including power and GND as well). So it needs to be the QFN48 package. But that will fit on a small board.

If you could start with a very typical schematic for the ice40 - including the two voltage regulators and the flash circuitry (e.g. resistors required and what not), that would be already of great help.

I can then add all the stuff around the 40007 (voltage translators and buffers where required).

A github repository would be nice (I can create one if required).

Suggestions?
WRT 4 layer PCB cost I suggest you take a look at jlcpcb :-

https://cart.jlcpcb.com/quote?orderType=1&stencilLayer=4&stencilWidth=54&stencilLength=20&stencilCounts=10

US$13 for x10 4 layer PCB's  (54mm X 20mm) - based on the size of the DIL40 packaged.

Its going to cost you so much extra in design time working with only 2 layers - its not wort the cost IMO.

I use Labcenter electronics ARES / ISIS PCB CAD software - sorry  KiCad would take me to long to learn, and if its ANYTHING like Altuim I have to sometimes work with I'd rather shoot myself in the head...

I use JLC PCB all the time and would never go back to expensive European based PCB company's. The PCBs typically arrive a week after issuing the Gerbers - depends on your country's customs clearance / when the weekend falls etc...

SerErris

Then it does not make sense too much. 

I do understand all your concerns, but also will not move from mine. 

4layer PCB is still too expensive compared to 2layer. Time for the design is not a problem but actual hardware cost is just too high. You still need the other components. 

I will work on it. 

Thanks still for asking.
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

SerErris

Quote from: GUNHED on 18:12, 20 October 22Why not using 64 colors instead of 32?
Color selection actually uses &40-&5F, the values &60-&7F are free and could be used.
Imagine a CPC with 64 colors. All the brown and gray we miss.  :)
The problem is not the gatearray, but the voltage levels we do have available.

Currently we actually have 3 different voltage levels. 0V, 2.5V and 5V. And this for 3 colors generates in total 3^3 = 27 colors. If you closely follow the documentation, you will identify that some colors are repeats of others so 27 is correct in the maximum of colours the CPC can support. 

So it does not only depend on the gatearray, but also would require a mod of the CPC mainboards.
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

GUNHED

Thanks for the information. So the voltage levels come from outside the GA.

And probably it's hard to get additional voltage levels inside the new GA, right?

Somehow the KC compact has 64 colors possible, I did hear. Don't know if this is real or a rumor though.
http://futureos.de --> Get the revolutionary FutureOS (Update: 2022.03.09)
http://futureos.cpc-live.com/files/LambdaSpeak_RSX_by_TFM.zip --> Get the RSX-ROM for LambdaSpeak :-) (Updated: 2021.12.26)

eto

Quote from: GUNHED on 17:22, 25 October 22Somehow the KC compact has 64 colors possible, I did hear. Don't know if this is real or a rumor though.
It has a 2bit DAC per colour but it can only produce 3 different voltage levels so unfortunately it will also only produce 27 different colours.


Bread80

For my gate array I'm using the following circuit. The resistor values have only been very roughly trimmed for the main colours but otherwise look good. You're welcome to copy.You cannot view this attachment.

martin464

Wow this is interesting. Could you sandwich 2 PCB's together to make a double sided PCB that plugged together and double the volume? I have some contacts in the electronics business.. my main client is a contract electronics mfg in Wales.... know a couple of dudes who do crazy stuff (they use JTAG/Coldfire equip/ICT all that sounded familiar. I'm not an electronics buff myself). Also I have contacts in sourcing for checking availability of items, they owe me a favour or two

But on more important matters Retro, who is that girl in your avatar?!
CPC 464 - 212387 K31-4Z

zhulien


SerErris

Quote from: GUNHED on 17:22, 25 October 22Thanks for the information. So the voltage levels come from outside the GA.

And probably it's hard to get additional voltage levels inside the new GA, right?

Somehow the KC compact has 64 colors possible, I did hear. Don't know if this is real or a rumor though.
The CPC in total has three different voltage levels per color. It has no additional brigthness or something.

EE wise that is getting generated via a tri-state buffer in the gate array. So the gate array can output 0 or 5V (two states) or disconnect the output and let if floating (so call High-Z or high impedance). That is when the pull up resistor on the CPC main board kicks. In the situation that the color output (for each channel individually) from the gate array is HighZ the pull up pulls it up to 2.5V (roughly). So the gate array itself actually has only 2 states for each colour, but paired with the feature to controlled cut off the output completely it is actually having thee different output levels. 

So there is no easy way (without a DAC or anything alike) to create more colors. We would need a 4bit output per color to get to 64 colors in total. The registers in the gate array could do that. But we would need two options for a mod:

1. Remove the CPC mainboard from the equation and directly wire the GA to the video port (no resistors or path from the mainboard is getting used).
2. Remove the resistors from the mainboard and make it a direct path.

Both are actually changing the CPC to something different (which was not the aim here) and also 2 would not be reversable.

1. Could be implemented by just pulling some new wires from the GA pins to the video port. That could be reversed very easily as the replacement gate array could just not use the pins on the socket. 
2. Would be a permanent change and I think that is not a good thing, as it is very hard to reverse.

However even it would work, it would not be compatible with existing software. The first 32 coulours should not change for compatibility reasons, however the new colours will fall in between. You can simply see that we currently already have black (color off) and pure color 100% (e.g. red). And we do have  a 50% red level. So we would now move the 50% red level to 25% red and create a new 75% red level. 

In essence that would mean, that the original colors would be different (so calling color 27 will not result in the same color) and also the would be different in brigthness as there is simply no 50% color anymore. 

I think there would be no interest in here to start programming everything from scratch and in complete different color scheme.

Summary:
For all of that reason, I think we will never get any better color than we always had. The gate array replacement will not improve on that, as it is in the first order a replacement of the existing model and needs to be in first priority 100% compatible.
Proud owner of 2 Schneider CPC 464, 1 Schneider CPC 6128, GT65 and lots of books
Still learning all the details on how things work.

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