Hello,
the cpcwiki page describes PSG register 7 "Mixer Control Register" as follow:
7h - Mixer Control Register
The control register enables or disables the sound channels. Each channel can output a Tone and/or Noise.
Bit 0 Channel A Tone (1=off, 0=on)
Bit 1 Channel B Tone (1=off, 0=on)
Bit 2 Channel C Tone (1=off, 0=on)
Bit 3 Channel A Noise (1=off, 0=on)
Bit 4 Channel B Noise (1=off, 0=on)
Bit 5 Channel C Noise (1=off, 0=on)
Bit 6 Port A Direction (1=output, 0=input) (should be always 0 for CPC)
Bit 7 Port B Direction (1=output, 0=input) (not used in CPC)
If both Tone and Noise are disabled on a channel, then a constant HIGH level is output (useful for digitized speech).
If both Tone and Noise are enabled on the same channel, then the signals are ANDed (the signals aren't ADDed) (ie. HIGH is output only if both are HIGH).
By mistake, I set the bit 6 to 1 while programming sound. The result on a real CPC and some emulators (Arnold, CPCE, Java CPC Desktop )
is that CPC keyboard becomes unreadable which is normal because Port A is set to output. All CPC keys are returned as pressed.
But in emulators like Winape, Sugarbox, Reloaded CPC keyboard is still perfectly readable.
I believe this is tested in my code:
amstrad cpc "acid" test (http://www.cpcwiki.eu/forum/emulators/amstrad-cpc-%27acid%27-test/)
Hello,
Nice global bug report !
Thanks for it, i'll add a fix as soon as possible.
Do you have a test dsk, by the way ?
Quote from: Lone on 18:02, 03 February 16
Hello,
Nice global bug report !
Thanks for it, i'll add a fix as soon as possible.
Do you have a test dsk, by the way ?
Here's a sample code.
when bit 6 is correctly emulated when set to 1, 10 bytes matrix buffer should be filled with $FF and CPC will reset as
I check for combinaison CTL+SHIFT+ESC to reset CPC in code.
What data is read from the ports after a value has been written? Your test code doesn't actually write anything to PSG Reg 14. Is the value read the same as the value written when in output mode?
Quote from: Executioner on 23:17, 08 February 16
What data is read from the ports after a value has been written? Your test code doesn't actually write anything to PSG Reg 14. Is the value read the same as the value written when in output mode?
The problem is when reading the keyboard after setting bit 6 to 1 for PSG register 7:
- In WinApe and some other emulators when you read the state byte for the ten keyboard rows,
it returns bit set for each key not pressed when reading port 14 of PSG
- On a real CPC and most emulators for each key not pressed
it returns bit reset when reading port 14 of PSG
Quote from: Executioner on 23:17, 08 February 16
What data is read from the ports after a value has been written? Your test code doesn't actually write anything to PSG Reg 14. Is the value read the same as the value written when in output mode?
Hmmm.. I thought it checks all the registers 0-15?
EDIT: Run psg.bin
first test "port A out r/w test"
:)
test 3:
port A w through test
@40Crisis (http://www.cpcwiki.eu/forum/index.php?action=profile;u=951), I'm not certain you understood the question. If I do:
Write PSG Reg 7 with Bit 6 Set.
Write PSG Reg 14 with #AA
Read PSG Reg 14
What value does it return?
If the PSG contains buffered I/O Ports like the 8255, it may return #AA, rather than #00
Normal keyboard reading with Port A set to Input has each bit high when the key is NOT pressed, this is correct.
@arnoldemu (http://www.cpcwiki.eu/forum/index.php?action=profile;u=122): What checks all the registers? Not the provided sample code from what I saw, does the DSK image have something different on it?
Quote from: Executioner on 22:02, 10 February 16
@arnoldemu (http://www.cpcwiki.eu/forum/index.php?action=profile;u=122): What checks all the registers? Not the provided sample code from what I saw, does the DSK image have something different on it?
Look in the "acid test" thread here on the forum.
amstrad cpc "acid" test (http://www.cpcwiki.eu/forum/emulators/amstrad-cpc-'acid'-test/)
Download arnold wip's source. Go to to the test/cpctests directory. In there are loads of tests.
I've tested ppi, psg, fdc, asic, crtc, many are automatic and give a success or fail. Some are visual.
The dsk should be up to date but if not you can run the make.bat to build it using pasmo and cpcxfs.
Run psg.bin
first test does exactly this. it sets AY port A direction and writes and then reads back the values. It does all 255 values.
The second test does AY port B.
This will answer the question ;)