Are there any schematics for an external RAM expansion? I'm trying to build an internal RAM expansion with SRAMs but fail with the ideas I had. I thought it might make sense to first check how the external ones work and try to rebuild it - and then see if an internal one could be made.
The Inicrons did an 512 KB battery/accumulator buffered external S-RAM expansion. The data can be accessed probably by using a way back machine of the inicron.de homepage.
Quote from: GUNHED on 00:07, 29 August 23The Inicrons did an 512 KB battery/accumulator buffered external S-RAM expansion. The data can be accessed probably by using a way back machine of the inicron.de homepage.
It's also on the WIKI, but not the schematics. Worst case, I can try to reverse engineer the PCB files.
Would these brd-files help?
or... here (with schematics):
Nachentwicklung der RAM ROM Box von Inicron für den Amstrad CPC und KCC - Robotrontechnik-Forum (https://www.robotrontechnik.de/html/forum/thwb/showtopic.php?threadid=19738)
RAM-ROM Box nach Inicron, modifiziert - eb-harwardts Webseite! (jimdofree.com) (https://eb-harwardt.jimdofree.com/8-bit-technik/cpc-kcc-ram-rom-box-nach-inicron/)
Thanks, I have seen this before but the schematics are hard to read. I could contact the author though. BRB files will be the alternative.
thanks for reminding me of this gem ;-)
RAMDIS not use.
Quote from: HAL6128 on 10:58, 29 August 23Would these brd-files help?
finally had a look into it
Unfortunately this is not a RAM expansion and does not help as much as I hoped.
Well, take a look at this then... :) :) :)
Do you want to shadowed rambank 1?
Quote from: eto on 11:36, 29 August 23Thanks, I have seen this before but the schematics are hard to read. I could contact the author though. BRB files will be the alternative.
thanks for reminding me of this gem ;-)
Hi Eto,
I think I have an Inicron RAM expansion somewhere. I bought it from someone who built it and said it didn't work, but I don't think I ever tested it or tried to repair it. I can see if I can find it if it's of any use to you?
Bryce.
Quote from: McArti0 on 23:13, 31 August 23Do you want to shadowed rambank 1?
Not sure yet how I will do it. First step is to understand how it works in general.
RAMDISK disables reading from internal memory.
The 6128 disables via PAL nCAS for internal memory.
Now I don't know how to disable Write to internal memory.
Quote from: McArti0 on 09:26, 01 September 23Now I don't know how to disable Write to internal memory.
on the 6128 the PAL logic ensures (as far as I understand) that when RAMDIS is high, CAS0 and CAS1 will never be low.
When RAMDIS is HIGH, CAS0 can be low when /CPU is HIGH (for Screen read by GA).
Quote from: McArti0 on 10:05, 01 September 23When RAMDIS is HIGH, CAS0 can be low when /CPU is HIGH (for Screen read by GA).
true, I was only referring to CPU read/write
https://www.cpcwiki.eu/index.php/RAM_BOX
Here is schem, but ...i dont know...
https://github.com/revaldinho/cpc_ram_expansion
Quote from: IanS on 20:11, 01 September 23https://github.com/revaldinho/cpc_ram_expansion
Yes, great to build one but there are no schematics.
Thanks everyone for helping out and special thanks to Toto for the work of drawing the schematics.
Prototype PCBs have been ordered :-)
This scheme has major flaws.
Quote from: McArti0 on 08:13, 02 September 23This scheme has major flaws.
But you're not going to say what they are?? :picard:
Bryce.
Quote from: eto on 06:45, 02 September 23Quote from: IanS on 20:11, 01 September 23https://github.com/revaldinho/cpc_ram_expansion
Yes, great to build one but there are no schematics.
Not in the usual form, but all the connection information needed is there
https://github.com/revaldinho/cpc_ram_expansion/blob/master/cpc_ram_expansion/pcb/cpc_ram_board_74_v3.00.v
Quote from: Bryce on 2.09.2023, 12:23:11
But you're not going to say what they are?? Bryce.
The transistor is unable to give a high signal to the RAMDIS input.
I think the resistor R1 is for the base of the transistor.
Mayby transistor npn is in other topology? Revers current with GND for colector?
Emiter to PIN RAMDIS, Collector to VCC.
Does anyone want to correct the schematic?
How this work (http://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCAMB0l3AWAnC1b0DZwwExxwOwEDMkAHDhigSAKyR0gLF0CmAtGGAFBi05M44JANoIEwgQyl1uAJ0HTyikIRk48kbgHcVeMquX7w3AOZ6CAhEJxkDDLQBdwBLGBGGD7mRHa0QnNBgOO6oZARkGGTkGBxeQgAmrABmAIYArgA2jtwASp4uWMZg4lBl1owOUNC03ACSINGS4KXeZTD+tflNbQheHtLY0jWqIw41Oi0SbWCuzTxAA)
Quote from: McArti0 on 13:56, 02 September 23Quote from: Bryce on 2.09.2023, 12:23:11
But you're not going to say what they are?? Bryce.
The transistor is unable to give a high signal to the RAMDIS input.
I think the resistor R1 is for the base of the transistor.
Mayby transistor npn is in other topology? Revers current with GND for colector?
Or maybe the transistor isn't there to set the RAMDIS, rather to detect if some other expansion is sending a RAMDIS signal so that the expansion RAM also gets disabled?
Bryce.
Quote from: Bryce on 20:12, 02 September 23Bryce.
NO. TotO simply confused the supply BUS when drawing the schem.
I showed above.
so there's no misunderstanding.
Quote from: McArti0 on 23:13, 31 August 23Do you want to shadowed rambank 1?
The Inicron RAM expansion allows to either use the second 64 KB of the CPC or the buffered S-RAM of the RAM-Box. A switch can select it.
I don't understand at all why the CPC 464 doesn't allways write to the internal RAM when the RAM extension is connected. After all, RAMDIS blocks read only. GA does not know if additional ram is connected. GA should always write to rambank0. Does anyone know how this happens?
Quote from: McArti0 on 18:44, 03 September 23I don't understand at all why the CPC 464 doesn't allways write to the internal RAM when the RAM extension is connected. After all, RAMDIS blocks read only. GA does not know if additional ram is connected. GA should always write to rambank0. Does anyone know how this happens?
QuoteIn the special case '**' marked in column '011' internal memory at 0x4000-0x7FFF is remapped to 0xC000-0xFFFF. This is handled internally in the CPC6128 and plus machines. The 464 and 664 don't perform this remapping. Further, the 464 and 664 do not write protect internal RAM when external memory is accessed. On the original DK-Tronics expansions these two issues were handled by backdriving the A15 and MREQ* signals on the bus, overdriving the values from the Z80 CPU in an electrical conflict.
from https://github.com/revaldinho/cpc_ram_expansion/wiki/'Old-School'-CPC6128-512KB-and-1MB-RAM-Expansion-Cards
High MREQ electrical forcing agains Z80? Did someone want to kill the Z80? :-X
It is dangerous to use RAM extensions for 464 and 664. :o
Quote from: McArti0 on 22:18, 03 September 23High MREQ electrical forcing agains Z80? Did someone want to kill the Z80? :-X
It is dangerous to use RAM extensions for 464 and 664. :o
obviously it isn't. This trick is used for 38 years and no Z80 were killed yet.
OMG. I didn't know that was possible!
Ok. Mystery solved. Thanks!