The mega memory expansion

[rpalmer]

CPCers,
Here is the current state of implementing a 64 Megabyte memory expansion in all of its glory.
The 64Mb schematic shows some chips which some people may not be familiar with and these are the TXB0108 and the MAX-II.
The TXB0108 is just a bi-directional voltage translator converting between the CPC 5V and the MAX-II voltage level of 2.5V.
The MAX-II is a CPLD to handle the SDRAM chip and make it look like it is a static RAM (SRAM) to the CPC. The verilog code (MemoryModule_Verilog.v) is the internal program of the MAX-II which does all of the magic.

The PAL code goes to the memory management unit to latch data and addresses for memory handling and to perform the Dk'Tronics memory functions.
The schematic has been drawn in Eagle (The free version) and I am also looking at maybe converting them to KiCAD.
rpalmer

[roudoudou]

Hi
Do you plan to manage asic connections?
I mean disabling expansion memory writes  in the 4000-7FFF zone when asic is enabled?
Regards

[rpalmer]

I have only planned for the memory expansion to work first via a classic CPC motherboard.
As for using it with the ASIC, if it is there and the memory access is the same protocol then I guess it does not matter.
I don't have access to an ASIC CPC, so I just don't know for sure what would happen.
rpalmer

[GUNHED]

Are the 64 MB backed up using a battery or similar?

[roudoudou]

I have only planned for the memory expansion to work first via a classic CPC motherboard.
As for using it with the ASIC, if it is there and the memory access is the same protocol then I guess it does not matter.
I don't have access to an ASIC CPC, so I just don't know for sure what would happen.
rpalmer

Asic is mapped 4000-7FFF so If you do not care about it any write access to asic will Also occur in any expansion memory.
Simpliest Way is to monitor RMR2
If asic page is mapped then no write

[rpalmer]

Are the 64 MB backed up using a battery or similar?

There is at the moment no battery backup as can be seen in the schematic in the zip file from my initial post.
It may be possible, but for now I just want to get it working. Also if i get the DMA/CPU board working as well it can DMA transfer data at a minimum of 4MHz so 64 MB would be about 20 seconds to fill (or at 20MHz some 3 seconds).

rpalmer