Tip on setting up a plus cartridge

[Shining]

I developed my schnapps demo using WinApe, ArnoldEmu and C4CPC and I was running out of time
so I have to blame myself not to test it on classic cartridge before.
So it came as it "should" be: Burning the cart to EPROM, it did not work/start.

Lucky me (in the middle of the night, the day I want to travel to the release party),
I very fast had the right idea, so after 4 more EPROMS burnt, it worked.

So to prevent you from stepping into the same trap, here some words about it:

Beginning to develop a cart demo, the only example I found, to start up a cart was this:

http://cpctech.cpc-live.com/source/cart.html

till today my code bases on this (other assembler):

Code Select Expand

.org 0x0000

start:
di                      ;; disable interrupts
im 1                    ;; set interrupt mode 1
jp start_continue

.org 0x0038
exx
ld hl,(_irqVector)
jp (hl)

.org 0x0040
exx
ld hl,(_irqVectorRam)
jp (hl)

.org 0x00100
start_continue:
ld bc,#0xf782            ;; setup initial PPI port directions
out (c),c
ld bc,#0xf400            ;; set initial PPI port A (AY)
out (c),c
ld bc,#0xf600            ;; set initial PPI port C (AY direction)
out (c),c


ld bc,#0x7fc0            ;; set initial RAM configuration
out (c),c

;; unlock ASIC so we can access ASIC registers
ld b,#0xbc
ld hl,#sequence
ld e,#17
seq:
ld a,(hl)
out (c),a
inc hl
dec e
jr nz,seq
;; set initial CRTC settings (screen dimensions etc)
ld hl,#end_crtc_data
ld bc,#0xbc0f
crtc_loop:
out (c),c
dec hl
ld a,(hl)
inc b
out (c),a
dec b
dec c
jp p,crtc_loop

;; Stack at 0xc000
ld    sp,#0xc000
jp    _main 


This code worked with both emulators and C4CPC but not on real cart.
So my initial idea was to look at the beginning of a cart, which I knew was running:
Pentomino, built with http://www.cpcwiki.eu/index.php/Nocart.
Nocart does here quite simillar things with one exeption:
the first instructions were:

Code Select Expand

LD BC,#0x7F89
out (C),c

This instruction sets the initial ram/rom combination to:
- reset 52 screen line count
- put lower rom to 0x0000
- disable upper rom
- mode 1 (which is not important here)

In the (not working) example code and in mine code, this initial instruction
came later and looked like this:

Code Select Expand

ld bc,&7fc0            ;; set initial RAM configuration
out (c),c

The difference is:
- upper rom is enabled
- mode 0

This second code is still in my now working startup-code.

I did not examine this any further yet, but like this, it is working.


My idea, why the old code worked on c4cpc is, that the c4cpc does something on plus
(showing some text on screen or running the cartridge selector) and therefor the plus is not
virgin at startup. Why it did run on emulators, I do not know.

[roudoudou]

My idea, why the old code worked on c4cpc is, that the c4cpc does something on plus
and therefor the plus is not virgin at startup. Why it did run on emulators, I do not know.

the C4CPC modify (as far as i know) interrupt mode and memoryi always do this

Code Select Expand

;********************* MANDATORY TO EXECUTE WITH A C4CPC ***************
im 1 ; don't know why but C4CPC corrupt interruption mode!
;***
ld bc,#7FC0 ; default memory conf
out (c),c
ld sp,0     ; raz 64K with stack
ld bc,4
ld hl,0
.raz
repeat 32
push hl
rend
djnz .raz
dec c
jr nz,.raz


[Shining]

Jep, IM1, I did very early, but I also think it is important to set the default memory conf very early (like in your example).
I thought that this is not that important cause the code starts at 0x000, irqs were off and the default configuration is that cart page 0 is at 0x000. So I did not think, that setting a defined ram/rom status at the very first is that important....

[gerald]

Here is the code executed before handing over to the cartridge

Code Select Expand

   
    ld  bc, #0xDF00    out (c), c        ; upper rom 0
    ld  bc, #0x7F80   
    out (c), c        ; enable upper/lower rom, mode 0
    ld  bc, #0xF79B   
    out (c), c        ; put PPI like out of reset state
    im 0
    ld a, #0x7F
    ld r, a
    rst #0
Interrupt mode is set to IM0, as is is out of Z80 reset.
Memory and PPI is also set as there where out of reset.
Asic was locked and interrupt disabled before jumping to this code.
Regarding the memory, just note that you're not supposed found it cleared fro granted, same for most of the register content.
One thing I am not doing is to reset the CRTC registers.

[GUNHED]

7fc0 does set standard RAM, but NOT the ROM!