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#1
Quote from: Targhan on Yesterday at 20:15Does any emulator show this?Quote from: andycadley on Yesterday at 12:38I have a sneaking suspicion you may not get audio on a Plus machine if you don't,Yup, you're right!
It would be a very absurd design. Blocking the F4 port to switch something in F6? After all, AY works the same way.
#2
I have not tried it. I would guess the C3 paging (well, the part that re-addresses the internal RAM) is done by the ASIC? But it would be interesting to check if someone has a 464+.
There is no shadowing or other tricks in the Gemini.
There is no shadowing or other tricks in the Gemini.
#3
Quote from: MaV on Yesterday at 22:56That one?Probably the right meeting, but not this demo. Ours was subtitled "the vache from hell". Couldn't find it on CPC Power...
#4
Just wondering: If the Gemini is used on a Plus 464, what's happening to C3 paging? Is that handled by Gemini (shadowing)? Is it ignored and not present? Or does the Plus 464 handle C3 anyway?
#5
Hi,
just tried both versions you uploaded to cpcrulez.fr. They work, but not 100% - in the menu, there is always the first entry missing. Makes no difference if I use the disc or tape version, tried it on a physical CPC and also in various emulators. Maybe there went something wrong while making the copy?
Can you please verify this behavior if it's also with your copy of Matrix?
With kind regards,
Egon
just tried both versions you uploaded to cpcrulez.fr. They work, but not 100% - in the menu, there is always the first entry missing. Makes no difference if I use the disc or tape version, tried it on a physical CPC and also in various emulators. Maybe there went something wrong while making the copy?
Can you please verify this behavior if it's also with your copy of Matrix?
With kind regards,
Egon
#6
Quote from: lightforce6128 on Yesterday at 23:41The idea of dithering is to mix a signal with ...In other words, it is local PWM.
Samples 33333333444444444
Can be replaced with...
333334343434344444
This means that
33333 /3.5, 3.5, 3.5, 3.5/ 44444
#7
Applications (CPC and CPC-related) / Re: CPC6128 - CP/M System Disk...
Last post by eto - Today at 07:22You can find an overview of PCW system disks here:
https://www.habisoft.com/pcwwiki/doku.php?id=en:sistema:indice
You are probably right that one set is 8000 series and the other 9000 series.
If I remember right Locoscript is not a CP/M application so it will not run on a 6128.
CP/M on the CPC should be a standard CP/M. Afaik they only adapted the parts which have to be adapted to make sure CP/M can run on that architecture. But of course the CPC still needs to be able to read the disk format. If you want to try out some other CP/M programs you probably have to transfer the files to a disk (image) that is supported on the CPC.
https://www.habisoft.com/pcwwiki/doku.php?id=en:sistema:indice
You are probably right that one set is 8000 series and the other 9000 series.
If I remember right Locoscript is not a CP/M application so it will not run on a 6128.
CP/M on the CPC should be a standard CP/M. Afaik they only adapted the parts which have to be adapted to make sure CP/M can run on that architecture. But of course the CPC still needs to be able to read the disk format. If you want to try out some other CP/M programs you probably have to transfer the files to a disk (image) that is supported on the CPC.
#8
Applications (CPC and CPC-related) / Re: CPC6128 - CP/M System Disk...
Last post by McArti0 - Today at 06:50Quote from: tubs74 on Yesterday at 20:59Onto CP/M on the 6128, it boots with 61k available - on my spectrum +3 and C/PM I then have an M drive, that is the rest of the RAM - does CP/M on the 6128 have full access to 128k of RAM in a similar way?61kB are in the second 64kB. In the first 64kB are CPM and screen.
There are some CPM modifications to support memory larger than 128kB.
There is CPM 2.2 for cpc
#9
OUTI ;5
INC B ;1
NOP ;1
NOP ;1
1000/8=125kHz
INC B ;1
NOP ;1
NOP ;1
1000/8=125kHz
#10
In our Wiki I found this additional information about the sound chip AY-3-8912:
1) There are four different known versions of the chip used for the CPC. Maybe these versions behave differently, maybe not.
2) Internally the chip works with 125 kHz. This means even if its registers are updated with 166 kHz, it will nevertheless only update the volume with 125 kHz.
3) There are no additional control lines on the chip to acknowledge or synchronize with something. This means: If the chip is programmed to read in register values written by the CPU through the PPI (BDIR=1, B1=0), it will do this non-stop. The PPI will remember the last written value and keep it available (latch). What is not clear is if the PSG stops normal operation as long as registers are written. From my observation: It does not care and simply continues its normal work. This means: One can change register values (e.g. the volume level) during operation without altering the mode. This saves two OUT commands per sample.
4) Only the envelope shape register (#0D) somehow recognizes writing and restarts the envelope.
1) There are four different known versions of the chip used for the CPC. Maybe these versions behave differently, maybe not.
2) Internally the chip works with 125 kHz. This means even if its registers are updated with 166 kHz, it will nevertheless only update the volume with 125 kHz.
3) There are no additional control lines on the chip to acknowledge or synchronize with something. This means: If the chip is programmed to read in register values written by the CPU through the PPI (BDIR=1, B1=0), it will do this non-stop. The PPI will remember the last written value and keep it available (latch). What is not clear is if the PSG stops normal operation as long as registers are written. From my observation: It does not care and simply continues its normal work. This means: One can change register values (e.g. the volume level) during operation without altering the mode. This saves two OUT commands per sample.
4) Only the envelope shape register (#0D) somehow recognizes writing and restarts the envelope.