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Albireo is an expansion for the Amstrad CPC computers (all models). Its main goal is to provide reliable, fast, cheap and large storage, which it achieves by using a MicroSD card. But the board has a lot of features packed in:

  • USB host port, allowing to connect USB mass storage, mouse, and other USB peripherals
  • USB device port, allowing to link the CPC to a modern computer with maximal link speed (faster than the z80 can handle, and with on-board buffer and hardware flow control).

The interface is based on the WCH CH376 chip and allows access to USB mass storage and other USB devices on CPC.

The CH376 chip implements FAT32 in hardware, which means no filesystem driver is needed on the CPC side. It also implements the lower level aspects of USB, making it relatively easy to write drivers for other USB devices (mouse, joystick, ...).

What's in it?

  • SD and SDHC card mass storage support with fast (6 MHz) SPI link with the SD card. Hardware FAT32 support for easy file access. Raw sector access also possible for homegrown file-systems and other advanced applications.
  • USB host support with built in mass storage driver, also with FAT32 and direct sector access.
  • Generic USB host with direct control of USB endpoints, for connecting other kinds of USB devices.
  • High-speed (1.5 Mbaud) serial link with built-in USB interface for linking with other computers for fast data exchange. Includes flow control, 16 byte FIFO on CPC side, and 512 byte FIFO on remote side, allowing fast buffered and interrupt-driven operation.
  • Software configurable interrupt routing to either NMI or INT, or interrupt masking. Multiplexing of several interrupt sources: USB host controller, UART, remotely triggered, and CRTC CURSOR signal interrupts are gathered and easily accessible from a single interrupt status register.

Board revisions

The hardware went through multiple iterations before reaching final state. Each version identifies itself on the USB link and the version should be visible in Windows device manager or lsusb on Linux.

Initial prototypes

The first prototype was an hand-wired one. There were some changes to I/O ports used since then, so it is not usable anymore.

Version 0.9

The first 5 boards were manufactured with an early PCB design, which required some wire-patches to get things working. With the wire-patches, this version behaves the same as 1.0.

Version 1.0

About 20 boards were shipped with version 1.0. Unfortunately, as people started to write software using it it turned out that the serial port chip has compatibility problems with the z80 timings. As a result, this version of the board can use the serial port only with the FIFO disabled, which makes it impossible to reach high baudrates. The board is still perfectly usable if you are interested only in the microSD and USB host port.

Version 1.1

This version of the board replaces the serial chip with a slightly different one. The board still reads "v1.0" as it is the same PCB, only the chip used has changed.

You can identify your board from the info it sends on the USB device port, or by checking the serial chip (square chip on the back of the board). Version 1.0 uses a TI TL16C550D chip. Version 1.1 uses a NXP SC16C650B chip.

How does it work?

  • There are two main devices: the CH376 handles the USB host and SD card side of things, and is accessed at FE80 (data) and FE81 (command/status). The communication side is handled by a SC16C650B, mapped at FEB0-FEB7. This is similar to the chip used on most PC hardware and some Amiga expansions like the SilverSurfer.
  • There is an FT230X chip to convert the UART to USB for connecting with a modern PC (standard serial ports are not that common anymore, and they wouldn't be fast enough anyway). The FT230X also generates 12MHz and 48MHz clocks for the two other chips.
  • The 16C650 "modem control" lines are connected to various things (CH376 interrupt, FT230X general IO pin for remote control) and turns them into interrupts.

What is it useful for?

Not much currently because there is no software yet, but in the future:

  • Use the USB key or SD card directly from BASIC and well-behaving apps (which support extra disk ROMs and a C drive). Load games and tools from the mass storage media
  • Connect to another computer like the CPC Booster, load snapshot, DSK or other files from it and write them to floppies or the mass storage media. A snapshot of 128K could be loaded in 0.86 seconds, a snapshot of 64K in less than 0.43 seconds.
  • Use SLIP (serial line IP) and a properly setup gateway (Linux machine or similar) to connect the CPC to the Internet.

There are a drivers in FutureOS and SymbOS to use Albireo with an USB mouse.


I/O ports

The decoding is clean, this means there aren't any mirror ports or undecoded address bits. Just the addresses listed below are used.

The addresses are in the I/O range, which means you access them with the OUT and IN instructions. They are not memory mapped, and to match with the CPC address decoding, the address is decoded on 16 bytes. This makes using OTIR and similar looped instructions tricky, but is required for compatibility with the CPC.

CH376 registers

  • FE80: "DATA" port (read/write)
  • FE81: "COMMAND" (write) and "STATUS" (read) port

SC16C650B registers

Some of the registers are sharing the same address. A register bit (DLAB) is used to switch between the two groups.

Address DLAB Description
FEB0 0 RBR/THR: RX buffer (read), TX buffer (write)
FEB1 0 IER: Interrupt enable
FEB0 1 DLL: Divisor latch LSB
FEB1 1 DLM: Divisor latch MSB
FEB2 IIR/FCR: Interrupt status (read), FIFO control (write)
FEB3 LCR: Line control
FEB4 MCR: Modem control
FEB5 LSR: Line status
FEB6 MSR: Modem status
FEB7 SCR: Scratch register

DIP switches

The board holds 4 DIP switches for configuration. From top to bottom:

S1 - CH376 interrupt enable

  • When this switch is ON, the usb controller is allowed to generate interrupts to signal the CPC when it is done performing an operation.
  • When this switch is OFF, the usb controller is not allowed to generate interrupts. The CPC must then poll the CH376 STATUS register to know wether the operation is finished.

S2 - CH376 reset enable

  • When this switch is ON, the CH376 will be reset at the same time as the CPC (hardware reset only).
  • When this switch is OFF, the CH376 will not be reset, and the CPC must initialize it using the reset command (software reset). In this case, the CH376 internal buffer may be used to store reset resident data (but I don't know if this is of any practical use, yet).

S3 - Remote reset enable

  • When this switch is ON, the DTR signal from the remote side of the serial link is connected to the CPC reset. This means that the remote side computer can trigger the CPC reset by toggling that line.
  • When the switch is OFF, such reset is not allowed and the CPC is safe.

S4 - Remote interrupt enable

  • When this switch is ON, the DTR signal from the remote side of the serial link is plugged to the DSR line of the UART controller. It then generates an interrupt which the CPC can process.


Software supporting the Albireo

Upcoming software

  • Serial communication to communicate with a PC