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The Z80 executes a NMI (Non-Maskable Interrupt) on falling edge of the /NMI pin. Non-maskable means that the Z80 cannot disable it (unlike as normal INT, which can be disabled via DI opcode), however, hardware that generates NMIs may (or may not) include a mechanism to disable NMIs (via I/O Ports).

The NMI vector is at address 0066h, regardless of the I register, and of the IM interrupt mode. The CPCs BIOS does not contain a NMI handler at that address, so, on the CPC, NMIs can be used only when RAM is enabled (or when the internal BIOS ROM is replaced by external ROM via ROMDIS signal).

The built-in components in the CPC don't use NMIs. There are a few hardware expansions that do generate NMIs:

See Also

  • Aside from NMI, peripherals could also use External INTs (though this would require to recurse conflicts with the internal 300Hz INTerrupt).