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Z80

220 bytes added, 04:18, 1 September 2024
|-
| IX, IY (Index Registers) || 16-bit || Used for indexed addressing || Can be split into IXH/IXL, IYH/IYL for 8-bit access
|-
| I (Interrupt Vector) || 8-bit || Holds base address for interrupt mode 2 || Combined with external data to form an interrupt vector
|-
| R (Memory Refresh) || 8-bit || Increments after each instruction fetch to refresh DRAM || Only the lower 7 bits are incremented
|}
 
== Internal state ==
 
{| class="wikitable"
! Register !! Size !! Description !! Notes
|-
| IM (Interrupt Mode) || 2-bit || Specifies the interrupt mode (0, 1, or 2) || Controls how interrupts are handled:
* IM 1: Fixed vector at 0038h
* IM 2: Vector provided by I register and external data
|-
| I (Interrupt Vector) || 8-bit || Holds base address for interrupt mode 2 || Combined with external data to form an interrupt vector
|-
| R (Memory Refresh) || 8-bit || Increments after each instruction fetch to refresh DRAM || Only the lower 7 bits are incremented
|-
| IFF1 || 1-bit || Interrupt enable flag || Set when interrupts are enabled, cleared on disable
| IFF2 || 1-bit || IFF1 buffer || Allows interrupts to be enabled after the instruction following EI
|-
| WZ || 16-bit || Internal temporary register pair || Used for memory and address calculations |-| IR (not userInstruction Register) || 8-bit || Holds the opcode of the currently executing instruction || Internally used, not accessible)by the programmer
|}
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