* The simultaneous assertion of a hardware interrupt line and execution of BRK was not accounted for in the design — the BRK instruction will be ignored in such a case.
* Some instructions, particularly those involving branches or indexed addressing modes, incur an extra cycle if the processor has to cross a memory page boundary. This is problematic for time-sensitive code.
* Conditional jumps are only 8-bit relative. And unconditional jumps are only 16-bit absolute.
* Some instructions, particularly those involving branches or indexed addressing modes, incur an extra cycle if the processor has to cross a memory page boundary. This is problematic for time-sensitive code.
* The NOP instruction takes 2 full-cycles, not 1.