Changes

MOS 6502

No change in size, 00:21, 5 September 2024
/* BRK / IRQ / NMI / RESET */
On a BRK instruction, the CPU does the same as in the IRQ case, but sets bit #4 (B flag) in the copy of the status register that is saved on the stack.
The priority sequence for interrupts, from top priority to bottom, is as follows: RESET, NMI, BRK, NMI, IRQ.
=== Half Cycles ===
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