Changes

Externally, the processor uses a 16‑bit data bus, so memory accesses occur in 16‑bit (word) units, though it supports byte accesses via data strobes.  The address bus is 24 bits wide; while internal address computations occur using 32‑bit arithmetic, only the lower 24 bits are available on the physical pins. This design yields a flat memory model with a maximum addressable space of 16 MB without the complications of segmentation, simplifying both operating system design and application programming.