* INI/IND/INIR/INDR decrease B after storing the byte from the hardware port into memory. And OUTI/OUTD/OTIR/OTDR decrease B before sending the memory byte to the hardware port. [https://www.cpcwiki.eu/forum/programming/z80-documentation-errors/ Source]
* All PUSH and POP instructions utilize a 16-bit operand and the high-order byte is always pushed first and popped last. PUSH HL is PUSH H then L. POP HL is POP L then H.
* The 6502 post-decrements on PHA and pre-increments on PLA, while the Z80 pre-decrements on PUSH and post-increments on POP, making them behave in opposite ways.
* The 6502 uses only one addressing mode per instruction, while the Z80 can combine two different addressing modes within a single instruction.
* The 6502 saves flags automatically during interrupts; while the Z80 requires PUSH AF and POP AF.
* The 6502’s Decimal (BCD) mode automatically adjusts ADC and SBC results, while the Z80 requires a DAA instruction after each BCD addition and subtraction.
* When an LDxR / CPxR / INxR / OTxR instruction is interrupted, the interrupt handler sees some flags in a different state. [https://github.com/hoglet67/Z80Decoder/wiki/Undocumented-Flags#interrupted-block-instructions Source]
* LD A,I and LD A,R normally copy the state of IFF2 to the Parity flag. NMOS Z80 suffers a problem whereby LD A,I and LD A,R record the state of IFF2 after it has been reset if an interrupt is delivered during that instruction. [https://sinclair.wiki.zxnet.co.uk/wiki/Z80#LD_A,I_and_LD_A,R_bug Source]
* Although not mentioned in Zilog documentation, the Z80 CPU supports two types of reset: normal and special. A normal reset disables the maskable interrupt, selects interrupt mode 0, zeroes registers I & R and zeroes the program counter (PC). A special reset zeroes PC only. Furthermore, a hardware bug was discovered when the special reset occurs after a HALT instruction. [https://github.com/redcode/Z80/wiki/Z80-Special-Reset Source]
* Almost all Z80 inputs are sampled on a rising clock, but the /WAIT signal is sampled on a falling clock. [https://emulation.gametechwiki.com/index.php/Emulation_accuracy#Subcycle_accuracy Source]
* The 6502 post-decrements on PHA and pre-increments on PLA, while the Z80 pre-decrements on PUSH and post-increments on POP, making them behave in opposite ways.
* The 6502 uses only one addressing mode per instruction, while the Z80 can combine two different addressing modes within a single instruction.
* The 6502 saves flags automatically during interrupts; while the Z80 requires PUSH AF and POP AF.
* The 6502’s Decimal (BCD) mode automatically adjusts ADC and SBC results, while the Z80 requires a DAA instruction after each BCD addition and subtraction.
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