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765 FDC

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/* Other Variants */
µPD765 - Floppy Disc Controller (used in CPC 664, CPC 6128, 6128 Plus and [[DDI-1]] expansion).
 
Besides the Amstrad CPC, this chip equipped the [[PCW|Amstrad PCW]], the [[ZX Spectrum|ZX Spectrum +3]] and the [[PC|IBM PC]] (including [[Amstrad PC]]).
The recommended ports used by Amstrad and compatible interfaces are:
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Note: Bit b10 of the address port is reset as the FDC is seen as an expansion, even if it is an internal chip. Bit b7 is reset to select the FDC. Bits b8 and b0 are used to select the specific mode of operation. All other bits should be set to 1 to avoid conflict. [https://www.cpc-power.com/cpcarchives/index.php?page=articles&num=48 Source]
Note2: The [[Vortex Disc Drives|Vortex disc interface]] uses other ports. See its dedicated wiki page.
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== IC Models used in CPC Motor On/Off Flip-Flop ==Writing 00h to Port &FA7E turns all disk drive motors off, writing 01h turns all motors on. It is not possible to turn on/off the motor of a specific drive separately.
More than one manufacturer made 765 compatible ICs. These An exception are the ones known to be used in the CPC by looking at pictures of CPC mainboardsVortex F1-S, F1-D, M1-S and M1-D drives.(How are they different?)
All should operate almost identicallyAnother exception is the Gotek drives.They don't take the motor flip-flop into account and are always on. [https://64nops.wordpress.com/2021/07/04/a-la-decouverte-du-fdc/ Source]
* NEC D765AC [https://wwwSome FDC commands don't require the motor to be on.cpcwikiFor example, the seek or recalibrate commands, that move the floppy drive head, work fine with the motor off.euAnd seek/imgs/3/3c/CPC664_Z70205_MC0005B_PCB_Toprecalibrate also work with an empty drive (ie.jpg Source]* NEC D765AC-2 [https://www.cpcwiki.eu/imgs/4/45/CPC6128_PCB_Top_%28Z70210_MC0009A%29.jpg Source]* UMC UM8272A [[Media:Amstrad cpc 6128 azerty (fwithout a floppy disk inserted) placa2.jpg|Source]]* Zilog Z765APS [https://www64nops.cpcwikiwordpress.eucom/imgs2021/f07/fb10/CPC6128_Z70290_MC0020C_PCB_Top.jpg Source]* [[Zilog]] Z0765A08PSC [https:a-la-decouverte-du-fdc-episode-2//www.cpcwiki.eu/imgs/6/67/CPC6128_PCB_Top_%28Z70290_MC0020F%29.jpg Source]
The following data seperators are usedfloppy disk rotates at a nominal speed of 300rpm, with some tolerance. This tolerance of the FDC has been measured by [[Roudoudou]] to be ±12% (it worked from 220 kbits/s to 283 kbits/s for a reference of 250 kbits/s). [https://64nops.wordpress.com/2021/09/02/a-la-decouverte-du-fdc-episode-4/ Source]
* FDC9216 [https:The FDC speed is more impressive when you realize the Amstrad CPC’s tape loads at only 2 kbits//wwws in fast mode.cpcwiki.eu/imgs/4/45/CPC6128_PCB_Top_%28Z70210_MC0009A%29.jpg Source]* SED9420C [httpsNote://www.cpcwiki.eu/imgs/3/3c/CPC6128_PCB_Top_%28Z70290_MC0020A%29.jpg Source] The CPC464tape loading can be way faster than that if an MP3 player is used instead of a real physical tape, CPC472, 464 Plus and GX4000 are not equipped with a FDC chip. All the floppy disk drive models used by Amstrad are referenced as it has been demonstrated here: [https://wwwyoutu.cpcwiki.eube/index.php/Amstrad_FDD_part Amstrad FDD part]MAIsOIwgJWA
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== Accessing the FDC 765 ==
The Main Status Register (Port &FB7E) signalizes when the FDC is ready to send/receive the next byte through the Data Register.
The Data Register (Port &FB7F) is used to write Commands and Parameters, to read/write data bytes, and to receive result bytes. These 3 operations are called Command-, Execution-, and Result-Phase.:
<br> === * Command Phase === : A command consists of a command byte (eventually including the MT, MF, SK bits), and up to 8 parameter bytes. <br> === Execution Phase === During this phase, the actual data is transferred (if any). Usually that are the data bytes for the read/written sector(s), except for the Format Track Command, in that case 4 bytes for each sector are transferred. During data transfers between the FDC and the processor, the FDC must be serviced every 26µs (for MFM mode with CPC timings) or the FDC terminates the FDC command. <br>
=== Result * Execution Phase ===: During this phase, the actual data is transferred (if any). Usually that are the data bytes for the read/written sector(s), except for the Format Track Command, in that case 4 bytes for each sector are transferred. During data transfers between the FDC and the processor, the FDC must be serviced every 26µs (for MFM mode with CPC timings) or the FDC terminates the FDC command.
* Result Phase: Returns up to 7 result bytes (depending on the command) that are containing status information. The Recalibrate and Seek Track commands do not return During the result bytes directlyphase, instead all the program result bytes must wait until the Main Status Register signalizes that the command has been completed, and then it must (!) send be read. The FDC will not accept a Sense Interrupt State new command to 'terminate' until all the Seek/Recalibrate commandresult bytes are read.
During the Note: The Recalibrate and Seek Track commands do not return result phasebytes directly. Instead, all the result bytes program must be readwait until the Main Status Register signalizes that the command has been completed. The FDC will not accept And then it must (!) send a new Sense Interrupt State command until all to 'terminate' the result bytes are readSeek/Recalibrate command.
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=== The 15 FDC Commands ===
{|
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=== FDC Status Registers ===
The Main Status register can always be read through Port &FB7E. The other 4 Status Registers cannot be read directly, instead they are returned through the data register as result bytes in response to specific commands.
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=== C, H, R, N values at result phase ===
If the processor terminates a read (or write) operation in the FDC, then the ID information in the Result phase is dependent upon the state of the MT bit and EOT byte:
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== Motor On/Off Flip-Flop =Notes =Writing 00h to Port &FA7E turns all disk drive motors off, writing 01h turns all motors on. It is not possible to turn on/off the motor of a specific drive separately. An exception are the Vortex F1-S, F1-D, M1-S and M1-D drives. (How are they different?) Another exception is the Gotek drives. They don't take the motor flip-flop into account and are always on. [https://64nops.wordpress.com/2021/07/04/a-la-decouverte-du-fdc/ Source] Some FDC commands don't require the motor to be on. For example, the seek or recalibrate commands, that move the floppy drive head, work fine with the motor off. And seek/recalibrate also work with an empty drive (ie. without a floppy disk inserted). [https://64nops.wordpress.com/2021/07/10/a-la-decouverte-du-fdc-episode-2/ Source] The floppy disk rotates at a nominal speed of 300rpm, with some tolerance. This tolerance of the FDC has been measured by [[Roudoudou]] to be ±12% (it worked from 220 kbits/s to 283 kbits/s for a reference of 250 kbits/s). [https://64nops.wordpress.com/2021/09/02/a-la-decouverte-du-fdc-episode-4/ Source] The FDC speed is more impressive when you realize the Amstrad CPC’s tape loads at only 2 kbits/s in fast mode. Note: tape loading can be way faster than that if an MP3 player is used instead of a real physical tape, as it has been demonstrated here: https://youtu.be/MAIsOIwgJWA <br> == Notes ==
Before accessing a disk you should issue a ''recalibrate'' command to the drive to move the head backwards until the ''track zero'' signal from the drive is sensed by the FDC. The FDC will also set its track counter for that drive to zero.
== Chip Variants ==
 
=== IC Models used in CPC ===
 
More than one manufacturer made 765 compatible ICs. These are the ones known to be used in the CPC by looking at pictures of CPC mainboards. All should operate almost identically.
 
* NEC D765AC [https://www.cpcwiki.eu/imgs/3/3c/CPC664_Z70205_MC0005B_PCB_Top.jpg Source]
* NEC D765AC-2 [https://www.cpcwiki.eu/imgs/4/45/CPC6128_PCB_Top_%28Z70210_MC0009A%29.jpg Source]
* UMC UM8272A [[Media:Amstrad cpc 6128 azerty (f) placa2.jpg|Source]]
* Zilog Z765APS [https://www.cpcwiki.eu/imgs/f/fb/CPC6128_Z70290_MC0020C_PCB_Top.jpg Source]
* [[Zilog]] Z0765A08PSC [https://www.cpcwiki.eu/imgs/6/67/CPC6128_PCB_Top_%28Z70290_MC0020F%29.jpg Source]
 
The following data seperators are used:
 
* FDC9216 [https://www.cpcwiki.eu/imgs/4/45/CPC6128_PCB_Top_%28Z70210_MC0009A%29.jpg Source]
* SED9420C [https://www.cpcwiki.eu/imgs/3/3c/CPC6128_PCB_Top_%28Z70290_MC0020A%29.jpg Source]
 
The CPC464, CPC472, 464 Plus and GX4000 are not equipped with a FDC chip.
 
All the floppy disk drive models used by Amstrad are referenced here: [https://www.cpcwiki.eu/index.php/Amstrad_FDD_part Amstrad FDD part]
 
=== Other Variants ===
NEC has developed various successors to the original uPD765, such as the uPD72065, uPD72067, and uPD72069.
The КР1810ВГ72А is a Soviet clone of the Intel i8272. It is used in the [[Aleste 520EX]] clone of the Amstrad CPC computer.
 
=== Competitors ===
The main competitor of the µPD765 FDC chip on the market was the WD179x FDC chip family. Its main differences are:
* the 765 has drive select pins to directly select one of four floppy drives, while the 179x has none. Instead, external logic must be used to handle multiple drives.
* the 765 only does standard track formats (preamble, marks and data fields), while the 179x will write anything you tell it in the write track (formatting a track) mode.
 
Note: While the [[Oric-1/Atmos|Oric]] uses the same 3inch floppy disks as the Amstrad CPC, it uses the WD1773 (Jasmin) or WD1793 (Microdisc) FDC chip.
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