Changes

MOS 6502

No change in size, 30 April
/* Illegal instructions */
! ''No arg'' !! #$nn !! $nnnn !! $nnnn,X !! $nnnn,Y !! $nn !! $nn,X !! $nn,Y !! ($nn,X) !! ($nn),Y !! N !! V !! D !! I !! Z !! C
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| ALR DCP (ASRDCM) || || 4B || CF (26) || DF (7) || DB (7) || C7 (5) || D7 (6) || || C3 (8) || D3 (8) || || 0 N || - || - || - || Z || C || A AND oper, 0 M -> [76543210] 1 -> CF M, A - M || AND DEC oper + LSRCMP oper
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| ANC ISC (ISB, INS) || || || 0B EF (26) || FF (7) || FB (7) || E7 (5) || F7 (6) || || E3 (8) || || F3 (8) || N || - V || - || - || Z || C || A AND oper, bit(7) M + 1 -> M, A - M - CF -> A || AND INC oper + set CF as ASLSBC oper
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| ANC2 RLA || || 2B || 2F (26) || 3F (7) || 3B (7) || 27 (5) || 37 (6) || || 23 (8) || || 33 (8) || N || - || - || - || Z || C || M = CF <- [76543210] <- CF, A AND M -> A || ROL oper+ AND oper|-| RRA || || || 6F (6) || 7F (7) || 7B (7) || 67 (5) || 77 (6) || || 63 (8) || 73 (8) || N || V || - || - || Z || C || M = CF -> [76543210] -> CF, bitA + M + CF -> A, CF || ROR oper + ADC oper|-| SLO (ASO) || || || 0F (6) || 1F (7) || 1B (7) || 07 (5) || 17 (6) || || 03 (8) || 13 (8) || N || - || - || - || Z || C || M = CF <- [76543210] <- 0, A OR M -> A || ASL oper + ORA oper|-| SRE (LSE) || || || 4F (6) || 5F (7) || 5B (7) || 47 (5) || 57 (6) || || 43 (8) || 53 (8) || N || - || - || - || Z || C || M = 0 -> [76543210] -> CF , A EOR M -> A || LSR oper + EOR oper|-| LAS (LAR) || || || || || BB (4+p) || || || || || || N || - || - || - || Z || - || M AND SP -> A, X, SP || LDA/TSX oper |-| LAX || || || AF (4) || || BF (4+ set CF as ROLp) || A7 (3) || || B7 (4) || A3 (6) || B3 (5+p) || N || - || - || - || Z || - || M -> A -> X || LDA oper + LDX oper|-| SAX (AXS, AAX) || || || 8F (4) || || || 87 (3) || || 97 (4) || 83 (6) || || - || - || - || - || - || - || A AND X -> M || Stores the bitwise AND of A and X|-| TAS (XAS, SHS) || || || || || style="color: #CC0000;"|'''9B''' (5) || || || || || || - || - || - || - || - || - || A AND X -> SP, A AND X AND (H+1) -> M || Puts A AND X in SP and stores A AND X AND (high-byte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work|-| SHA (AHX, AXA) || || || || || style="color: #CC0000;"|'''9F''' (5) || || || || || style="color: #CC0000;"|'''93''' (6) || - || - || - || - || - || - || A AND X AND (H+1) -> M || Stores A AND X AND (high-byte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work|-| SHX (A11, SXA, XAS) || || || || || style="color: #CC0000;"|'''9E''' (5) || || || || || || - || - || - || - || - || - || X AND (H+1) -> M || Stores X AND (high-byte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work|-| SHY (SYA, SAY) || || || || style="color: #CC0000;"|'''9C''' (5) || || || || || || || - || - || - || - || - || - || Y AND (H+1) -> M || Stores Y AND (high-byte of addr + 1) at addrunstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| ANE (XAA) || || style="color: #CC0000;"|'''8B''' (2) || || || || || || || || || N || - || - || - || Z || - || (A OR magic) AND X AND oper -> A || * AND X + AND oper
Turrican 3 on C64 requires a different magic constant than $EE for ANE. $EF is recommended by Groepaz (VICE team)
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| LXA (LAX) || || style="color: #CC0000;"|'''AB''' (2) || || || || || || || || || N || - || - || - || Z || - || (A OR magic) AND oper -> A -> X || Store * AND oper in A and X
highly unstable: involves a 'magic' constant that depends on temperature, the chip series, and maybe other factors.
 
Wizball on C64 requires a $EE magic constant for LXA
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| ALR (ASR) || || 4B (2) || || || || || || || || || 0 || - || - || - || Z || C || A AND oper, 0 -> [76543210] -> CF || AND oper + LSR
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| ARR || || 6B (2) || || || || || || || || || N || V || - || - || Z || C || A AND oper, CF -> [76543210] -> CF || AND oper + ROR
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| DCP SBX (DCMAXS, SAX) || || || CF CB (62) || DF (7) || DB (7) || C7 (5) || D7 (6) || || C3 (8) || D3 (8) || || N || - || - || - || Z || C || M (A AND X) - 1 oper -> M, A - M X || DEC oper + CMP operand DEX at once, sets flags like CMP
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| ISC ANC || || 0B (ISB, INS2) || || || EF (6) || FF (7) || FB || || || || N || - || - || - || Z || C || A AND oper, bit(7) -> CF || E7 AND oper + set CF as ASL|-| ANC2 || || 2B (52) || F7 || || || || || || || || N || - || - || - || Z || C || A AND oper, bit(67) -> CF || AND oper + set CF as ROL|-| E3 USBC (8SBC) || F3 || EB (82) || || || || || || || || || N || V || - || - || Z || C || M + 1 -> M, A - M - ~CF -> A || INC SBC oper + SBC operNOP
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| JAM (KIL, HLT) || 02, 12, 22,
B2, D2, F2 (X)
|| || || || || || || || || || - || - || - || - || - || - || Stop execution || Halt the CPU. The processor will be trapped infinitely in T1 phase with $FF on the data bus. Reset required.
|-
| LAS (LAR) || || || || || BB (4+p) || || || || || || N || - || - || - || Z || - || M AND SP -> A, X, SP || LDA/TSX oper
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| LAX || || || AF (4) || || BF (4+p) || A7 (3) || || B7 (4) || A3 (6) || B3 (5+p) || N || - || - || - || Z || - || M -> A -> X || LDA oper + LDX oper
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| LXA (LAX) || || style="color: #CC0000;"|'''AB''' (2) || || || || || || || || || N || - || - || - || Z || - || (A OR magic) AND oper -> A -> X || Store * AND oper in A and X
highly unstable: involves a 'magic' constant that depends on temperature, the chip series, and maybe other factors.
 
Wizball on C64 requires a $EE magic constant for LXA
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| NOP (DOP, TOP) || 1A, 3A, 5A,
74, D4, F4 (4)
|| || || || - || - || - || - || - || - || No operation || No Operation
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| RLA || || || 2F (6) || 3F (7) || 3B (7) || 27 (5) || 37 (6) || || 23 (8) || 33 (8) || N || - || - || - || Z || C || M = CF <- [76543210] <- CF, A AND M -> A || ROL oper + AND oper
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| RRA || || || 6F (6) || 7F (7) || 7B (7) || 67 (5) || 77 (6) || || 63 (8) || 73 (8) || N || V || - || - || Z || C || M = CF -> [76543210] -> CF, A + M + CF -> A, CF || ROR oper + ADC oper
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| SAX (AXS, AAX) || || || 8F (4) || || || 87 (3) || || 97 (4) || 83 (6) || || - || - || - || - || - || - || A AND X -> M || Stores the bitwise AND of A and X
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| SBX (AXS, SAX) || || CB (2) || || || || || || || || || N || - || - || - || Z || C || (A AND X) - oper -> X || CMP and DEX at once, sets flags like CMP
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| SHA (AHX, AXA) || || || || || style="color: #CC0000;"|'''9F''' (5) || || || || || style="color: #CC0000;"|'''93''' (6) || - || - || - || - || - || - || A AND X AND (H+1) -> M || Stores A AND X AND (high-byte of addr + 1) at addr
unstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
|-
| SHX (A11, SXA, XAS) || || || || || style="color: #CC0000;"|'''9E''' (5) || || || || || || - || - || - || - || - || - || X AND (H+1) -> M || Stores X AND (high-byte of addr + 1) at addr
unstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| SHY (SYA, SAY) || || || || style="color: #CC0000;"|'''9C''' (5) || || || || || || || - || - || - || - || - || - || Y AND (H+1) -> M || Stores Y AND (high-byte of addr + 1) at addr
unstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| SLO (ASO) || || || 0F (6) || 1F (7) || 1B (7) || 07 (5) || 17 (6) || || 03 (8) || 13 (8) || N || - || - || - || Z || C || M = CF <- [76543210] <- 0, A OR M -> A || ASL oper + ORA oper
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| SRE (LSE) || || || 4F (6) || 5F (7) || 5B (7) || 47 (5) || 57 (6) || || 43 (8) || 53 (8) || N || - || - || - || Z || C || M = 0 -> [76543210] -> CF, A EOR M -> A || LSR oper + EOR oper
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| TAS (XAS, SHS) || || || || || style="color: #CC0000;"|'''9B''' (5) || || || || || || - || - || - || - || - || - || A AND X -> SP, A AND X AND (H+1) -> M || Puts A AND X in SP and stores A AND X AND (high-byte of addr + 1) at addr
unstable: sometimes 'AND (H+1)' is dropped, page boundary crossings may not work
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| USBC (SBC) || || EB (2) || || || || || || || || || N || V || - || - || Z || C || A - M - ~CF -> A || SBC oper + NOP
|}
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