== The Decode ROM (PLA) ==
With 65xx family every instruction consumes multiple cycles. On the first cycle the opcode is fetched and saved internally, and in later cycles this determines the various corresponding actions which need to happen -- for example selecting an ALU function, or cueing an internal register to update itself from one of the internal buses. The PLA coordinates this. It inputs the opcode and the counter that says which cycle is presently happening. Then the outputs of the PLA trigger whatever actions need to happen in that particular cycle for that particular instruction. [http://forum.6502.org/viewtopic.php?f=1&t=4914 Source]
The instruction register, which holds the opcode, and the current clock cycle within the instruction (T0 to T6) get fed into a 130×21 bit decode ROM, i.e. a ROM with 130 lines of 21 bits each.