On a BRK instruction, the CPU does the same as in the IRQ case, but sets bit #4 (B flag) in the copy of the status register that is saved on the stack.
The priority sequence for interrupts, from top priority to bottom, is as follows: RESET, BRK, NMI, IRQ.[https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf Source at chapter 7.19]
=== Half Cycles ===