Using a simple PWM, data is entered at a certain speed, the PWM clock speed.
If you simulate a constant PWM output signal at middle range of voltage (state just between 0V and 5V : 2.5V), it results a an alternance of 0V and 5V, that result in a noise sound. In Arkanoid, this defect make some continues sounds instead of silents...
My idea is generating a sound having a frequency upper that dog ultra sound, when while I want to simulate a constant 2.5V.
For this I do use two clocks entries in my PWM : one about data entry, and another about algorithm execution.