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Motorola 68000

802 bytes removed, 27 April
/* Architecture */
| SR (Status Register) || 16-bit || Holds processor status (Condition Codes) and system control bits. Divided into User Byte (CCR) and System Byte. <br/> '''User Byte (CCR - Condition Code Register, bits 0-7):''' <br/> * bit 0 - C (Carry) <br/> * bit 1 - V (Overflow) <br/> * bit 2 - Z (Zero) <br/> * bit 3 - N (Negative) <br/> * bit 4 - X (Extend) <br/> '''System Byte (bits 8-15):''' <br/> * bit 10,9,8 - I2, I1, I0 (Interrupt Mask) <br/> * bit 13 - S (Supervisor State) <br/> * bit 15 - T (Trace Mode) <br/> (Other bits reserved/unused in base 68000) || User programs can typically only read/write the CCR (lower byte). System Byte modification requires Supervisor privileges. X flag used for multi-precision arithmetic. S bit determines User/Supervisor mode (and active A7). T bit enables single-step tracing. I bits control interrupt priority level.
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== Operating Modes ==
 
Two distinct operating modes are available with the 68000 processor to protect the operating system from user programs. The two modes are called user mode, and supervisor mode.
 
A flag in the status register will determine which state the processor is in at any one time. Certain instructions (e.g., STOP) cannot be executed while the 68000 is in user mode, and a privilege violation exception process will be initiated by the processor if such an execution is attempted.
 
When the processor is in user mode, the user stack pointer (USP) will be used by stack related operations. Conversely, the supervisor stack pointer (SSP) will be used when the processor is in supervisor mode.
 
The two stack pointers are also treated as address registers, and are both labelled A7.
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