*[[FDC|765 FDC]] is bloated with 40 pins, compared to 28 pins for the WD1772 FDC used in the [[Atari ST]]. It is also a black box internally, while the [[C64]] uses a regular 6502 (with its own ROM and RAM) as FDC.
And unlike the [[ZX Spectrum]] and the [[MSX]], on the Amstrad CPC and Plus things can often go catastrophically wrong if bus timings are not accurately emulated.
Thankfully, many tools and tests exist to help emulation authors.
== Diagnostics ==
*[https://auamstrad.es/software/aua-utilidades/ AUA Utilidades] [https://www.cpc-power.com/index.php?page=detail&num=5113 Amstest] [https://www.cpc-power.com/index.php?page=detail&num=17932 Amstrad Diagnostics] [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/amstrad-diagnostics-rom/msg243665/] [https://www.cpcwiki.eu/forum/software-related/8255-manufacturer-detection/] [https://www.cpc-power.com/index.php?page=detail&num=6545 STS SysInfo] [https://www.cpc-power.com/index.php?page=database&r1=1&lemot=test%20crtc%20v Test CRTC type] [http://quasar.cpcscene.net/doku.php?id=coding:test_crtc] [http://cpc.sylvestre.org/technique/technique_identifier_crtc.html Identifying CRTC visually] [https://www.cpc-power.com/index.php?page=detail&num=11446 Basic Program Status Window] [https://www.cpc-power.com/index.php?page=detail&num=12584 Version du Firmware Basic]
*[http://www.symbos.de/appinfo.htm?00061 SyMon] [http://www.symbos.de/appinfo.htm?00047 HexE] [https://www.cpc-power.com/index.php?page=detail&num=6987 RAM Expansion Test] [https://www.cpc-power.com/index.php?page=detail&num=14833 MemTest] [https://www.cpc-power.com/index.php?page=detail&num=14834 RAM Test CRTC4] [https://www.cpcwiki.eu/forum/technical-support/test-ram-de-mcleod-ideafix/ Test RAM de McLeod Ideafix] [https://www.cpc-power.com/index.php?page=detail&num=15739 RAM Check] [https://www.cpc-power.com/index.php?page=detail&num=13386 Testprogram For All ERAM] [https://www.cpc-power.com/index.php?page=detail&num=16010 Test RAM Basic] [https://www.cpc-power.com/index.php?page=detail&num=19185 Xenon 2] [https://www.cpc-power.com/index.php?page=detail&num=12188 Take On Me] [https://www.cpc-power.com/index.php?page=detail&num=14339 Trololo Experiments] [https://www.cpc-power.com/index.php?page=detail&num=19406 Still The One] [https://www.cpc-power.com/index.php?page=detail&num=16084 Post Scriptum] [https://www.cpc-power.com/index.php?page=detail&num=18658 Onescreen Colonies #2 256K] [https://www.cpc-power.com/index.php?page=detail&num=15985 A tribute to the sisters] [https://amstrad-ggp.itch.io/mightysf Mighty Steel Fighters] [https://cpcrulez.fr/info-chany-enhanced_edition.htm Chany 512K cracks] [https://www.cpc-power.com/index.php?page=detail&num=14814 Anti-Multiface] [https://www.cpc-power.com/cpcarchives/index.php?page=articles&num=151 Expanded RAM software list] RAM exercisers
*[https://www.cpc-power.com/index.php?page=detail&num=15975 FutureOS] [https://www.cpc-power.com/index.php?page=detail&num=4174 CP/M Plus] [https://www.cpcwiki.eu/forum/software-related/what-software-requires-c3-ram-banking/msg246339/#msg246339 Fuzix OS] [https://www.cpc-power.com/index.php?page=detail&num=10030 Phortem] [https://www.cpcwiki.eu/forum/software-related/what-software-requires-c3-ram-banking/msg246582/#msg246582 PhX] [https://www.cpc-power.com/index.php?page=detail&num=19308 DSC4] [https://www.cpc-power.com/index.php?page=detail&num=7270 Pac-Man Emulator] Problematic [[PAL16L8|RAM mode &C3]] on CPC464/664
The way to cause the RAM refresh to fail in both a Plus or normal CPC is simply to stop a few bits of the CRTC address changing (ie. never refresh the selected area).
Generally, only the Row address needs to be cycled, so stopping MA0 through MA7 from changing, and stopping the CPU from reading those rows, will cause data to be lost, quite quickly (generally around 4ms).
*Detecting corruption in the PSG registers when a register write is not validated. [https://www.cpcwiki.eu/forum/programming/interesting-walkthrough-video-coding-a-pet-to-play-samples-at-60khz/msg250874/#msg250874 Source]
*Playing with the "floating" bus. Using Z80 read I/O commands to write to chip registers. Accessing ghost registers. Using undocumented I/O ports. Writing to multiple chips simultaneously. Changing PPI and PSG ports direction.
*Focusing on the minute details in [[Z80]], [[CRTC]], [[8255|PPI]] and [[PAL16L8|PAL]] chips. They are most often wrong in emulators.